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Author SHA1 Message Date
Paul Mathieu
d726014c6c gitignore: add *.pyc 2022-05-07 11:35:49 -07:00
Paul Mathieu
f27edd36d7 as: fix empty param list 
nop was failing
 2022-05-07 11:34:35 -07:00
Paul Mathieu
1a88bebf82 tools: remove hardcoded references to paths 2022-05-07 11:33:45 -07:00
Paul Mathieu
2bfced6a2b dsp: update test 2021-07-26 00:04:53 -07:00
Paul Mathieu
5948622212 dsp: add sample programs 2021-07-26 00:03:56 -07:00
Paul Mathieu
57984c093d dsp: add midi synth program 2021-07-26 00:03:32 -07:00
Paul Mathieu
ef9a154681 cc: add const arrays (wip) 
Add a preliminary version of const arrays. It sorta works.
Right now this is limited to function-scope const arrays.
 2021-07-26 00:02:14 -07:00
Paul Mathieu
e7bab6e9e6 dsp: add uart1 at 31250 baud for midi support 2021-07-26 00:00:26 -07:00
Paul Mathieu
b01d6a4873 cc: fix bug with regbank snap 2021-07-25 23:58:17 -07:00
Paul Mathieu
8dfa5addfd cc: add shr 2021-07-25 23:55:36 -07:00
Paul Mathieu
edb4161724 cc: typo in grammar 2021-07-25 23:52:58 -07:00
Paul Mathieu
112b593660 uart: RX adaptive clock and over sampling 
Now sampling 3 times per bit and shifting the clock accordingly.
Had to split the rx and tx clocks.
 2021-07-25 23:50:53 -07:00
Paul Mathieu
1d69c453a8 uart: make baudrate a generic 2021-07-25 23:50:09 -07:00
Paul Mathieu
1d36528b2c dsp: add missing test boot rom template 2021-04-24 08:58:42 -07:00
Paul Mathieu
194659c4b9 dsp: adjust output volume for earbuds 2021-04-24 08:58:18 -07:00
Paul Mathieu
67634ca178 dsp: refactor test 2021-04-24 08:57:55 -07:00
Paul Mathieu
71212cde2d cc: fix loaded variables after if block 2021-04-24 08:56:51 -07:00
Paul Mathieu
84cbd185bb sysbus: fix concurrent read & writes 2021-04-24 08:55:51 -07:00
Paul Mathieu
3294e7082b wave: fix write to busy sysbus 2021-04-24 08:55:23 -07:00
Paul Mathieu
c12c28fb44 dsp: add bootloader 
It works!!
 2021-04-17 23:13:20 -07:00
Paul Mathieu
a864ca3d7e dsp: allow fetching instructions from SRAM 2021-04-17 23:11:04 -07:00
Paul Mathieu
102e9cbd07 uart: fix synthesis warnings 2021-04-17 23:07:56 -07:00
Paul Mathieu
0e6a311610 ld: allow linking to a different offset 2021-04-17 23:05:02 -07:00
Paul Mathieu
2ab6b4a5a9 cc: add += and function pointers 2021-04-17 23:04:30 -07:00
Paul Mathieu
36bc1417b6 cpu: more instruction pipelining 
This is needed to make WNS room for fetching instructions from SRAM.
 2021-04-17 23:02:58 -07:00
Paul Mathieu
6825ce464f cc: fix load bug 2021-03-20 21:49:40 -07:00
Paul Mathieu
a4005ade77 dsp: small refactor 2021-03-20 21:27:36 -07:00
Paul Mathieu
ef81ec3b12 cc: mostly fixed function calls 2021-03-20 21:27:26 -07:00
Paul Mathieu
eb303641d9 cc: fix typo 2021-03-20 21:25:01 -07:00
Paul Mathieu
f7b7118278 dsp: non-functional code. needs funcall refactor in cc 2021-03-18 20:14:00 -07:00
Paul Mathieu
b70cdd13c4 Add partial support for 8-bit loads 
We're big-endian.
when we have this in memory:

00 01 02 03

And we need the first byte, we load the first 16-bit word:

0x0001

The first byte is then in the upper part of the word, and requires
a right shift by 8.
So any load into an 8-bit typed container needs to shift stuff.

So far, stores from/to the stack are exempted, they always load/store
full 16-bit words.

And a few othe rminor things. Like string null terminators.
And escaped characters in character literals.

Can you believe it's spelled 'literal', with a single t?
Me neither.
 2021-03-18 08:35:23 -07:00
Paul Mathieu
5612f23181 dsp: flash these LEDs 2021-03-14 18:09:05 -07:00
Paul Mathieu
38542f4431 dsp: add make target for bitstream 2021-03-14 18:08:53 -07:00
Paul Mathieu
7ba6746ddd cpu: streamline hold a little 2021-03-14 18:08:13 -07:00
Paul Mathieu
48ffd4eb6d cc: fix field access bug 2021-03-14 18:07:52 -07:00
Paul Mathieu
0a38fdb9fd gitignore: a few more things 2021-03-14 12:18:36 -07:00
Paul Mathieu
6ea04f1f6b dsp: some UART logging \o/ 2021-03-14 12:18:01 -07:00
Paul Mathieu
6609dfa4b1 uart: can now write more stuff 2021-03-14 12:17:48 -07:00
Paul Mathieu
7841987b6e cc: add support for string literals and some stuff 
- string literals added as rodata
- fixed register shuffling in for/while loops & fun calls
- a few other fixes
 2021-03-14 12:16:21 -07:00
Paul Mathieu
54c69dd962 dsp: add missing alu.vhdl in makefile 2021-03-14 12:14:55 -07:00
Paul Mathieu
d1d0e421ce cpu: make BEQ and BNEQ only PC-relative 2021-03-14 12:14:29 -07:00
Paul Mathieu
24c6831813 Small fixes for synthesis 2021-03-13 21:02:54 -08:00
Paul Mathieu
14dba00fd0 Add dsp 
With:
- LED control
- UART
- PDM out
- square wave generator (DMA to PDM out (was it really necessary?))
- sample program that plays a square wave from UART values
 2021-03-13 15:50:25 -08:00
Paul Mathieu
75b5488b8d uart: upgrade C api 2021-03-13 15:49:28 -08:00
Paul Mathieu
5d5eeb45cc sysbus: fix reading not holding address 2021-03-13 15:49:00 -08:00
Paul Mathieu
960c8956b2 wave: add header 2021-03-13 15:47:24 -08:00
Paul Mathieu
963cd1059e square: stay quiet if period = 0 2021-03-13 15:46:20 -08:00
Paul Mathieu
790c08f1f2 ld: now generates a full rom vhdl from template 2021-03-13 15:44:48 -08:00
Paul Mathieu
e1557ad4b6 cc: add -I preprocessor option 2021-03-13 15:44:22 -08:00
Paul Mathieu
a3a67105eb cc: add support for structs 
- now we keep track of expression type
- added '|' and '|=' operators
- implemented '->' operator
- minor cleanups
 2021-03-13 15:42:39 -08:00