Paul Mathieu b01d6a4873 cc: fix bug with regbank snap

2021-07-25 23:58:17 -07:00

base @ e27480fa5d

Add base submodule

2021-02-17 13:23:18 -08:00

cpu

cpu: more instruction pipelining

2021-04-17 23:02:58 -07:00

dsp

dsp: add missing test boot rom template

2021-04-24 08:58:42 -07:00

first

hello: simplify interconnect

2021-03-12 14:18:37 -08:00

sysbus

sysbus: fix concurrent read & writes

2021-04-24 08:55:51 -07:00

tools

cc: fix bug with regbank snap

2021-07-25 23:58:17 -07:00

uart

uart: RX adaptive clock and over sampling

2021-07-25 23:50:53 -07:00

wave

wave: fix write to busy sysbus

2021-04-24 08:55:23 -07:00

.gitignore

dsp: add bootloader

2021-04-17 23:13:20 -07:00

.gitmodules

Add base submodule

2021-02-17 13:23:18 -08:00

Description

No description provided

2 MiB

Languages

C 69.7%

C++ 15.5%

VHDL 7.5%

Python 5.2%

Tcl 1%

Other 0.9%