dsp: add make target for bitstream

This commit is contained in:
Paul Mathieu 2021-03-14 18:08:53 -07:00
parent 7ba6746ddd
commit 38542f4431

View File

@ -1,6 +1,7 @@
all: sim rom
sim: dsp_test.ghw
rom: boot_rom.gen.vhdl
bin: ../lab/dsp/au_base_project.runs/impl_1/au_top.bin
CC = ../bin/cc
LD = ../bin/ld
@ -17,6 +18,12 @@ sources = boot_rom.gen.vhdl dsp.vhdl \
../uart/uart.vhdl \
../first/ram.vhdl
../lab/dsp/au_base_project.runs/impl_1/au_top.bin: ../lab/dsp/au_base_project.runs/synth_1/au_top.dcp
../lab/dsp/au_base_project.runs/impl_1/runme.sh
../lab/dsp/au_base_project.runs/synth_1/au_top.dcp: $(sources)
../lab/dsp/au_base_project.runs/synth_1/runme.sh
%.gen.vhdl:
$(LD) -o $@ --vhdl $*.vhdl.in $^
@ -29,7 +36,7 @@ sources = boot_rom.gen.vhdl dsp.vhdl \
work-obj93.cf: $(sim_sources) $(sources)
ghdl -a $^
PHONY: sim clean
PHONY: bin sim rom clean
clean:
rm -rf *.o *.gen.vhdl *.ghw work-obj93.cf