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| Author | SHA1 | Date | |
|---|---|---|---|
| 55c6be3d00 | |||
| 23a4a69670 | |||
| b8d828c438 | |||
| 467ef32107 | |||
| 9edebe637b | |||
| dd51b5d610 | |||
| f0f26af791 | |||
| 724f8db1b1 | |||
| 269a04d5f5 | |||
| 2e640690ba | |||
| e7b38fb560 |
14
mbv/Makefile
14
mbv/Makefile
@@ -26,16 +26,20 @@ dev-image:
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dev: dev-image ## Run a dev container
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docker run -it --rm -v $(CURDIR):/workspace -w /workspace mbv-dev
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.PHONY: precommit
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precommit: ## Make sure everything looks ok before pushing
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$(MAKE) bootloader
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$(MAKE) helloworld
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$(MAKE) timer
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$(MAKE) uart
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$(MAKE) async
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.PHONY: clean
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clean: ## Remove generated files
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rm -rf *.elf *.bin $(all_objects) $(deps)
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rm -rf test/ *.dSYM $(test_deps) *.o
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rm -rf *.elf *.bin
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.PHONY: help
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help: ## Show this help
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@echo Noteworthy targets:
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@egrep '^[a-zA-Z_-]+:.*?## .*$$' $(firstword $(MAKEFILE_LIST)) | sort | awk 'BEGIN {FS = ":.*?## "}; {printf "\033[36m%-20s\033[0m %s\n", $$1, $$2}'
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.DEFAULT_GOAL := help
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#-include $(deps)
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#-include $(test_deps)
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@@ -21,6 +21,13 @@ SECTIONS
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*(.rodata*)
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} > RAM
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.init :
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{
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__init_array_start = .;
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KEEP(*(.init_array*))
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__init_array_end = .;
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}
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.bss (NOLOAD) :
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{
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_bss_begin = .;
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@@ -1,27 +0,0 @@
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#pragma once
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#include <cstdint>
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struct Gpio {
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volatile uint32_t data;
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};
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#define gpio0 ((Gpio*)0x40000000)
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inline void ToggleLed(int which) {
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uint8_t data = gpio0->data;
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data ^= (0x1 << which);
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gpio0->data = data;
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}
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inline void SetLed(int which) {
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uint8_t data = gpio0->data;
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data |= (0x1 << which);
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gpio0->data = data;
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}
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inline void ClearLed(int which) {
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uint8_t data = gpio0->data;
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data &= ~(0x1 << which);
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gpio0->data = data;
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}
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@@ -1,26 +1,58 @@
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#include "async.h"
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#include "buffer.h"
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#include "gpio.h"
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#include "intc.h"
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#include "interrupts.h"
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#include "pol0.h"
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#include "timer.h"
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#include "trace.h"
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#include "hal/gpio.h"
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#include "hal/intc.h"
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#include "hal/interrupts.h"
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#include "hal/pol0.h"
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#include "hal/timer.h"
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#include "lib/async.h"
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#include "lib/buffer.h"
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#include "uart.h"
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#include "uart_async.h"
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namespace {
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using async::AwaitableType;
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Timer* timer0;
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constexpr uint32_t kTicksPerSecond = 100'000'000;
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constexpr uint32_t kTicksPerMicrosecond = 100;
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constexpr uint32_t kOverflowSeconds = (1ULL << 32) / kTicksPerSecond;
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constexpr uint32_t kOverflowMicroseconds =
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((1ULL << 32) % kTicksPerSecond) / kTicksPerMicrosecond;
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void Uart0Isr() {
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ToggleLed(7);
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HandleUartIsr();
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Timer* timer0;
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volatile uint32_t t1overflowsecs = 0;
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volatile uint32_t t1overflowusecs = 0;
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Gpio* gpio0;
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void ToggleLed(int which) {
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uint8_t data = gpio0->data;
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data ^= (0x1 << which);
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gpio0->data = data;
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}
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void SetLed(int which) {
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uint8_t data = gpio0->data;
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data |= (0x1 << which);
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gpio0->data = data;
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}
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void ClearLed(int which) {
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uint8_t data = gpio0->data;
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data &= ~(0x1 << which);
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gpio0->data = data;
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}
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void Uart0Isr() { HandleUartIsr(); }
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void Timer0Isr() {
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if (timer0->HasT1Overflowed()) {
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UartWriteCrash("t1 overflow\r\n");
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t1overflowsecs += kOverflowSeconds;
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t1overflowusecs += kOverflowMicroseconds;
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timer0->ClearT1Overflow();
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return;
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}
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SetLed(6);
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UartWriteCrash("blarg\r\n");
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__builtin_trap();
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}
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@@ -48,43 +80,49 @@ void SetupInterrupts() {
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}
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async::task<> echo() {
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async::task<uint8_t> reader = UartReadLoop();
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async::task<std::byte> reader = UartReadLoop();
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async::gimme<std::span<const std::byte>> feeder;
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async::task<> writer = UartWriteLoop(feeder);
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writer.h.resume(); // advance to first yield
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while (1) {
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SetLed(1);
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uint8_t c = co_await reader;
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std::byte c = co_await reader;
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ClearLed(1);
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ToggleLed(2);
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feeder.feed(std::as_bytes(std::span{&c, 1}));
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co_await feeder.feed(std::span{&c, 1});
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}
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}
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async::task<> blink() {
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while (1) {
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co_await async::delay(500);
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ToggleLed(0);
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timer0->Pet();
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co_await UartWrite(".");
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}
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}
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} // namespace
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#define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
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#define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
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int main() {
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SetupUart();
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UartWriteCrash("uart setup done\r\n");
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SetupTimer();
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UartWriteCrash("timer setup done\r\n");
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gpio0 = Gpio::Instance(GPIO0_BASE);
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gpio0->data = 0;
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SetupUart();
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UartWriteBlocking("uart setup done\r\n");
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SetupTimer();
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UartWriteBlocking("timer setup done\r\n");
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SetupInterrupts();
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async::schedule(echo().h);
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auto e = echo();
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auto b = blink();
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async::schedule(e.h);
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async::schedule(b.h);
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UartWriteCrash("init done. starting main loop\r\n");
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UartWriteBlocking("init done. starting main loop\r\n");
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async::main_loop([]() {
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static int cnt = 0;
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timer0->Pet();
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if ((cnt++ % 100000) == 0) {
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ToggleLed(0);
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}
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return false;
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});
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// should never get here
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@@ -96,12 +134,7 @@ int main() {
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#include <cstdint>
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#include "itoa.h"
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#include "lock.h"
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#ifndef SBRK_STATS
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#define SBRK_STATS 0
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#endif
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#include "lib/lock.h"
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extern unsigned char _heap_begin, _heap_end;
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@@ -119,8 +152,9 @@ extern "C" void* _sbrk(int increment) {
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extern "C" int _gettimeofday(struct timeval* tv, void* tzvp) {
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(void)tzvp;
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uint32_t ticks = timer0->GetT1Ticks();
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tv->tv_sec = ticks / 100000000;
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tv->tv_usec = (ticks % 100000000) / 100;
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tv->tv_sec = ticks / kTicksPerSecond + t1overflowsecs;
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tv->tv_usec =
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(ticks % kTicksPerSecond) / kTicksPerMicrosecond + t1overflowusecs;
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return 0;
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}
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@@ -1,71 +0,0 @@
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#include "trace.h"
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#include <algorithm>
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#include <chrono>
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#include "itoa.h"
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#include "lock.h"
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#include "uart.h"
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namespace tracing {
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namespace {
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struct Event {
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uint32_t timestamp;
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TraceEvent event;
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};
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constexpr size_t kTraceBufferSize = 256;
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std::array<Event, kTraceBufferSize> buffer;
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size_t write_ptr = 0;
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size_t size = 0;
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} // namespace
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void trace(int raw_event) { trace(static_cast<TraceEvent>(raw_event)); }
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void trace(TraceEvent event) {
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const std::chrono::system_clock::time_point now =
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std::chrono::system_clock::now();
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const uint32_t uptime_ticks = now.time_since_epoch().count();
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{
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InterruptLock lock;
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buffer[write_ptr] = {.timestamp = uptime_ticks, .event = event};
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write_ptr = (write_ptr + 1) % buffer.size();
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size = std::min(size + 1, kTraceBufferSize);
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#if TRACE_DUMP_WHEN_FULL
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if (size == kTraceBufferSize) {
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dump();
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}
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#endif // TRACE_DUMP_WHEN_FULL
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}
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}
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void dump() {
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InterruptLock lock;
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if (size == kTraceBufferSize) {
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std::rotate(buffer.begin(), buffer.begin() + write_ptr, buffer.end());
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}
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char number[] = "00000000";
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UartWriteCrash("----\r\n");
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for (Event event : std::span{buffer}.subspan(0, size)) {
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itoa(static_cast<int>(event.timestamp), number);
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UartWriteCrash(number);
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UartWriteCrash(" ");
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itoa(static_cast<int>(event.event), number);
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UartWriteCrash(number);
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UartWriteCrash("\r\n");
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}
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UartWriteCrash("----\r\n");
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size = 0;
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write_ptr = 0;
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}
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} // namespace tracing
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@@ -1,51 +0,0 @@
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#pragma once
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#define TRACE_DUMP_WHEN_FULL 0
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#ifdef __x86_64__
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#include <cstdio>
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#define TRACE(x) printf(#x "\n")
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#else // __x86_64__
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#define TRACE(...) tracing::trace(__VA_ARGS__)
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#endif // __x86_64__
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#include <cstdint>
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namespace tracing {
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enum class TraceEvent : uint8_t {
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kUnknown = 0,
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kUartIsr = 1,
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kUartRxCb = 2,
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kUartTxCb = 3,
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kUartSend = 10,
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kUartRecv = 11,
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kUartTxBufferFull = 12,
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kUartTxBufferNotFull = 13,
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kUartWriteDone = 20,
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kAsyncResume = 4,
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kAsyncEnqueue = 5,
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kAsyncTask = 6,
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kAsyncResumeSetPending = 7,
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kAsyncAwaitWasNotified = 8,
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kAsyncSchedule = 9,
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kAsyncTaskDone = 14,
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kAsyncException = 15,
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kAsyncCallParent = 16,
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kAsyncCallParentDone = 17,
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kAsyncCoAwait = 18,
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kAsyncSuspend = 19,
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kAsyncDestroy = 21,
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kAsyncGimmeWaiting = 22,
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kAsyncGimmeResume = 23,
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};
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void trace(TraceEvent event);
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void trace(int raw_event);
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void dump();
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} // namespace tracing
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@@ -1,14 +1,14 @@
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#include "uart.h"
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#include "async.h"
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#include "gpio.h"
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#include "lock.h"
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#include "pol0.h"
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#include "ring_buffer.h"
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#include "trace.h"
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#include "uart_async.h"
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#include "hal/gpio.h"
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#include "hal/pol0.h"
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#include "lib/async.h"
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#include "lib/lock.h"
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#include "lib/ring_buffer.h"
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#include "xuartlite.h"
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#include "uart_async.h"
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namespace {
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using async::AwaitableType;
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@@ -22,11 +22,43 @@ XUartLite_Config uart0_config = {
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.DataBits = 8,
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};
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constexpr size_t kUartRxBufferSize = 256;
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std::array<std::byte, kUartRxBufferSize> rx_buffer = {};
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RingBuffer rx_ring_buffer{.buffer = rx_buffer};
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constexpr size_t kUartTxBufferSize = 256;
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std::array<std::byte, kUartTxBufferSize> tx_buffer = {};
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RingBuffer tx_ring_buffer{.buffer = tx_buffer};
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XUartLite* uart0 = &uart0_inst;
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volatile bool sending;
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void StartReceiving() {
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while (1) {
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if (rx_ring_buffer.FreeSpace() < 1) {
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// woops, full. discard some data
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// TODO: keep track of overrun stats
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rx_ring_buffer.Pop(1);
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}
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if (XUartLite_Recv(uart0, rx_ring_buffer.RawWritePointer(), 1) < 1) {
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break;
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}
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rx_ring_buffer.Push(1);
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}
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}
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void StartSending() {
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if (sending) {
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return;
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}
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size_t tosend = tx_ring_buffer.ContiguousAvailableData();
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if (tosend < 1) {
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return;
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}
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sending = true;
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XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(), tosend);
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}
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} // namespace
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void InitUarts() {
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@@ -34,10 +66,14 @@ void InitUarts() {
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XUartLite_SetSendHandler(uart0, HandleUartTxFromIsr, nullptr);
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XUartLite_SetRecvHandler(uart0, HandleUartRxFromIsr, nullptr);
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StartReceiving();
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XUartLite_EnableInterrupt(uart0);
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sending = false;
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}
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void UartWriteCrash(std::span<const std::byte> data) {
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XUartLite_DisableInterrupt(uart0);
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while (data.size() > 0) {
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while (XUartLite_IsSending(uart0)) {
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}
|
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@@ -48,22 +84,19 @@ void UartWriteCrash(std::span<const std::byte> data) {
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}
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while (XUartLite_IsSending(uart0)) {
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}
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XUartLite_Send(uart0, nullptr,
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0); // reset buffer before enabling interrupts
|
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XUartLite_EnableInterrupt(uart0);
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}
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async::task<> UartWrite(std::span<const std::byte> data) {
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while (!tx_ring_buffer.Store(data)) {
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tracing::trace(tracing::TraceEvent::kUartTxBufferFull);
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co_await async::await(AwaitableType::kUartTx);
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tracing::trace(tracing::TraceEvent::kUartTxBufferNotFull);
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}
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|
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{
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InterruptLock lock;
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if (!XUartLite_IsSending(uart0)) {
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tracing::trace(tracing::TraceEvent::kUartSend);
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XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(),
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tx_ring_buffer.ContiguousAvailableData());
|
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}
|
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StartSending();
|
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}
|
||||
}
|
||||
|
||||
@@ -72,29 +105,19 @@ async::task<> UartWriteLoop(
|
||||
while (1) {
|
||||
auto data = co_await data_gen;
|
||||
while (!tx_ring_buffer.Store(data)) {
|
||||
tracing::trace(tracing::TraceEvent::kUartTxBufferFull);
|
||||
co_await async::await(AwaitableType::kUartTx);
|
||||
tracing::trace(tracing::TraceEvent::kUartTxBufferNotFull);
|
||||
}
|
||||
|
||||
{
|
||||
InterruptLock lock;
|
||||
if (!XUartLite_IsSending(uart0)) {
|
||||
tracing::trace(tracing::TraceEvent::kUartSend);
|
||||
XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(),
|
||||
tx_ring_buffer.ContiguousAvailableData());
|
||||
}
|
||||
StartSending();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: use chunks to allow receiving more than 256 bytes at once
|
||||
void UartReadBlocking(std::span<std::byte> data) {
|
||||
size_t bytes_received = 0;
|
||||
while (bytes_received < data.size()) {
|
||||
auto* buffer = reinterpret_cast<uint8_t*>(data.data() + bytes_received);
|
||||
tracing::trace(tracing::TraceEvent::kUartRecv);
|
||||
bytes_received +=
|
||||
XUartLite_Recv(uart0, buffer, data.size() - bytes_received);
|
||||
while (!rx_ring_buffer.Load(data)) {
|
||||
}
|
||||
}
|
||||
|
||||
@@ -104,21 +127,14 @@ void UartWriteBlocking(std::span<const std::byte> data) {
|
||||
|
||||
{
|
||||
InterruptLock lock;
|
||||
if (!XUartLite_IsSending(uart0)) {
|
||||
tracing::trace(tracing::TraceEvent::kUartSend);
|
||||
XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(),
|
||||
tx_ring_buffer.ContiguousAvailableData());
|
||||
}
|
||||
StartSending();
|
||||
}
|
||||
}
|
||||
|
||||
async::task<uint8_t> UartReadLoop() {
|
||||
uint8_t c;
|
||||
async::task<std::byte> UartReadLoop() {
|
||||
std::byte c;
|
||||
while (1) {
|
||||
tracing::trace(tracing::TraceEvent::kUartRecv);
|
||||
size_t received = XUartLite_Recv(uart0, &c, 1);
|
||||
// some data may already be in the fifo, but if not, wait:
|
||||
if (received < 1) {
|
||||
while (!rx_ring_buffer.Load(std::span{&c, 1})) {
|
||||
co_await async::await(AwaitableType::kUartRx);
|
||||
}
|
||||
|
||||
@@ -128,38 +144,23 @@ async::task<uint8_t> UartReadLoop() {
|
||||
|
||||
async::task<buffer> UartRead(int size) {
|
||||
auto buff = buffer::make(size);
|
||||
auto* data = reinterpret_cast<uint8_t*>(buff.data.data());
|
||||
tracing::trace(tracing::TraceEvent::kUartRecv);
|
||||
size_t received = XUartLite_Recv(uart0, data, buff.data.size());
|
||||
// some data may already be in the fifo, but if not, wait:
|
||||
if (received < buff.data.size()) {
|
||||
while (!rx_ring_buffer.Load(buff.data)) {
|
||||
co_await async::await(AwaitableType::kUartRx);
|
||||
}
|
||||
co_return buff;
|
||||
}
|
||||
|
||||
void HandleUartTxFromIsr(void*, unsigned int transmitted) {
|
||||
sending = false;
|
||||
tx_ring_buffer.Pop(transmitted);
|
||||
if (tx_ring_buffer.AvailableData() > 0) {
|
||||
tracing::trace(tracing::TraceEvent::kUartSend);
|
||||
XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(),
|
||||
tx_ring_buffer.ContiguousAvailableData());
|
||||
}
|
||||
StartSending();
|
||||
async::resume(AwaitableType::kUartTx);
|
||||
}
|
||||
|
||||
void HandleUartRxFromIsr(void*, unsigned int) {
|
||||
void HandleUartRxFromIsr(void*, unsigned int transmitted) {
|
||||
rx_ring_buffer.Push(transmitted);
|
||||
StartReceiving();
|
||||
async::resume(AwaitableType::kUartRx);
|
||||
}
|
||||
|
||||
void HandleUartIsr() { XUartLite_InterruptHandler(uart0); }
|
||||
|
||||
extern "C" uint8_t XUartLite_GetSR(XUartLite*);
|
||||
|
||||
uint8_t UartStatus() { return XUartLite_GetSR(uart0); }
|
||||
|
||||
void LogStuff() {
|
||||
uint8_t data = gpio0->data;
|
||||
data |= (uart0->ReceiveBuffer.RemainingBytes & 0xf) << 4;
|
||||
gpio0->data = data;
|
||||
}
|
||||
|
||||
@@ -3,11 +3,11 @@
|
||||
#include <span>
|
||||
#include <string_view>
|
||||
|
||||
#include "async.h"
|
||||
#include "buffer.h"
|
||||
#include "lib/async.h"
|
||||
#include "lib/buffer.h"
|
||||
|
||||
async::task<buffer> UartRead(int size);
|
||||
async::task<uint8_t> UartReadLoop();
|
||||
async::task<std::byte> UartReadLoop();
|
||||
async::task<> UartWrite(std::span<const std::byte> data);
|
||||
inline async::task<> UartWrite(std::string_view s) {
|
||||
co_await UartWrite(std::as_bytes(std::span{s.data(), s.size()}));
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
#include <cstdint>
|
||||
|
||||
#include "gpio.h"
|
||||
#include "pol0.h"
|
||||
#include "hal/gpio.h"
|
||||
#include "hal/pol0.h"
|
||||
|
||||
namespace {
|
||||
|
||||
|
||||
@@ -1,12 +1,12 @@
|
||||
#include "timer.h"
|
||||
|
||||
#include <cstdint>
|
||||
|
||||
#include "bios.h"
|
||||
#include "gpio.h"
|
||||
#include "intc.h"
|
||||
#include "interrupts.h"
|
||||
#include "pol0.h"
|
||||
#include "hal/bios.h"
|
||||
#include "hal/gpio.h"
|
||||
#include "hal/intc.h"
|
||||
#include "hal/interrupts.h"
|
||||
#include "hal/pol0.h"
|
||||
#include "hal/timer.h"
|
||||
|
||||
|
||||
namespace {
|
||||
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
#include <cstdint>
|
||||
|
||||
#include "gpio.h"
|
||||
#include "intc.h"
|
||||
#include "interrupts.h"
|
||||
#include "pol0.h"
|
||||
#include "hal/gpio.h"
|
||||
#include "hal/intc.h"
|
||||
#include "hal/interrupts.h"
|
||||
#include "hal/pol0.h"
|
||||
#include "xuartlite.h"
|
||||
|
||||
namespace {
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#include <cstdint>
|
||||
|
||||
#include "pol0.h"
|
||||
#include "hal/pol0.h"
|
||||
#include "xuartlite.h"
|
||||
|
||||
uint8_t UartRead();
|
||||
|
||||
19
mbv/configure
vendored
19
mbv/configure
vendored
@@ -25,9 +25,9 @@ class Config:
|
||||
hostlibs = "-lgtest -lgmock -lgtest_main"
|
||||
hostldflags = "-fprofile-instr-generate -fcoverage-mapping"
|
||||
include_dirs = [
|
||||
"hal",
|
||||
".",
|
||||
"hal/uart",
|
||||
"hal/lib/common",
|
||||
"hal/xilinx",
|
||||
]
|
||||
common_flags = [
|
||||
"-g",
|
||||
@@ -269,10 +269,15 @@ hal = source_set("hal", [
|
||||
"hal/intc.cc",
|
||||
"hal/interrupts.cc",
|
||||
"hal/start.cc",
|
||||
"hal/lib/common/xil_assert.c",
|
||||
"hal/uart/xuartlite.c",
|
||||
"hal/uart/xuartlite_stats.c",
|
||||
"hal/uart/xuartlite_intr.c",
|
||||
"hal/uart/xuartlite_stats.c",
|
||||
"hal/xilinx/xil_assert.c",
|
||||
])
|
||||
|
||||
lib = source_set("lib", [
|
||||
"lib/async.cc",
|
||||
"lib/lock.cc",
|
||||
])
|
||||
|
||||
bootloader = source_set("bootloader", glob.glob("./bootloader/**/*.cc", recursive=True))
|
||||
@@ -289,23 +294,21 @@ def app_image(app, sources=None):
|
||||
return build_image(
|
||||
source_set(app, sources),
|
||||
linker_script="apps/app.ld",
|
||||
dependencies=[hal],
|
||||
dependencies=[hal, lib],
|
||||
elf_out=f"{app}.elf",
|
||||
bin_out=f"{app}.bin",
|
||||
)
|
||||
|
||||
all = [
|
||||
build_source_set(hal),
|
||||
build_source_set(lib),
|
||||
bootloader_image,
|
||||
|
||||
app_image("helloworld"),
|
||||
app_image("timer"),
|
||||
app_image("uart"),
|
||||
app_image("async", sources=[
|
||||
"apps/async/async.cc",
|
||||
"apps/async/lock.cc",
|
||||
"apps/async/main.cc",
|
||||
"apps/async/trace.cc",
|
||||
"apps/async/uart.cc",
|
||||
]),
|
||||
]
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
|
||||
extern "C" uint32_t _bss_begin, _bss_end, _initial_stack_pointer;
|
||||
extern "C" int main();
|
||||
extern "C" void __libc_init_array();
|
||||
|
||||
__attribute__((section(".start"), used, naked)) void _start() {
|
||||
// clear .bss
|
||||
@@ -11,6 +12,8 @@ __attribute__((section(".start"), used, naked)) void _start() {
|
||||
|
||||
asm volatile("la sp, _initial_stack_pointer");
|
||||
|
||||
__libc_init_array();
|
||||
|
||||
main();
|
||||
|
||||
while (true) {
|
||||
|
||||
@@ -37,11 +37,15 @@ struct Timer {
|
||||
|
||||
void EnableT1() {
|
||||
TCSR1.ARHT0 = 1;
|
||||
TCSR1.ENIT0 = 1; // enable interrupt for overflows
|
||||
TCSR1.ENT0 = 1;
|
||||
}
|
||||
|
||||
uint32_t GetT1Ticks() { return TCR1; }
|
||||
|
||||
bool HasT1Overflowed() { return TCSR1.T0INT; }
|
||||
void ClearT1Overflow() { TCSR1.T0INT = 1; }
|
||||
|
||||
void SetupAsWdt(uint32_t timeout_ticks) {
|
||||
TLR0 = timeout_ticks;
|
||||
TCSR0.LOAD0 = 1; // reset counter
|
||||
|
||||
@@ -1,39 +0,0 @@
|
||||
DRIVER_LIB_VERSION = 1.0
|
||||
COMPILER=
|
||||
ARCHIVER=
|
||||
CP=cp
|
||||
COMPILER_FLAGS=
|
||||
EXTRA_COMPILER_FLAGS=
|
||||
LIB=libxil.a
|
||||
|
||||
CC_FLAGS = $(COMPILER_FLAGS)
|
||||
ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
|
||||
|
||||
RELEASEDIR=../../../lib/
|
||||
INCLUDEDIR=../../../include/
|
||||
INCLUDES=-I./. -I$(INCLUDEDIR)
|
||||
|
||||
SRCFILES:=$(wildcard *.c)
|
||||
|
||||
OBJECTS = $(addprefix $(RELEASEDIR), $(addsuffix .o, $(basename $(wildcard *.c))))
|
||||
|
||||
libs: $(OBJECTS)
|
||||
|
||||
DEPFILES := $(SRCFILES:%.c=$(RELEASEDIR)%.d)
|
||||
|
||||
include $(wildcard $(DEPFILES))
|
||||
|
||||
include $(wildcard ../../../../dep.mk)
|
||||
|
||||
$(RELEASEDIR)%.o: %.c
|
||||
${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) $(DEPENDENCY_FLAGS) $< -o $@
|
||||
|
||||
.PHONY: include
|
||||
include: $(addprefix $(INCLUDEDIR),$(wildcard *.h))
|
||||
|
||||
$(INCLUDEDIR)%.h: %.h
|
||||
$(CP) $< $@
|
||||
|
||||
clean:
|
||||
rm -rf ${OBJECTS}
|
||||
rm -rf $(DEPFILES)
|
||||
@@ -387,8 +387,7 @@ int XUartLite_IsSending(XUartLite *InstancePtr)
|
||||
/*
|
||||
* Read the status register to determine if the transmitter is empty
|
||||
*/
|
||||
StatusRegister = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
|
||||
XUL_STATUS_REG_OFFSET);
|
||||
StatusRegister = XUartLite_GetSR(InstancePtr);
|
||||
|
||||
/*
|
||||
* If the transmitter is not empty then indicate that the UART is still
|
||||
|
||||
@@ -143,8 +143,7 @@ void XUartLite_InterruptHandler(XUartLite *InstancePtr)
|
||||
* Read the status register to determine which, coulb be both
|
||||
* interrupt is active
|
||||
*/
|
||||
IsrStatus = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
|
||||
XUL_STATUS_REG_OFFSET);
|
||||
IsrStatus = XUartLite_GetSR(InstancePtr);
|
||||
|
||||
if ((IsrStatus & (XUL_SR_RX_FIFO_FULL |
|
||||
XUL_SR_RX_FIFO_VALID_DATA)) != 0) {
|
||||
|
||||
@@ -6,7 +6,6 @@
|
||||
#include <utility>
|
||||
|
||||
#include "lock.h"
|
||||
#include "trace.h"
|
||||
|
||||
namespace async {
|
||||
namespace {
|
||||
@@ -33,7 +32,6 @@ std::array<Notification, static_cast<size_t>(AwaitableType::kNumTypes)>
|
||||
|
||||
void schedule(std::coroutine_handle<> h, int ms) {
|
||||
InterruptLock lock;
|
||||
TRACE(tracing::TraceEvent::kAsyncSchedule);
|
||||
std::chrono::system_clock::time_point exp =
|
||||
std::chrono::system_clock::now() + std::chrono::milliseconds(ms);
|
||||
Stuff* news = new Stuff{
|
||||
@@ -80,13 +78,7 @@ void step() {
|
||||
int stuffinqueue = 0;
|
||||
for (Stuff* s = stuff; s; s = s->next) stuffinqueue++;
|
||||
|
||||
TRACE(tracing::TraceEvent::kAsyncTask);
|
||||
stuff->h();
|
||||
TRACE(tracing::TraceEvent::kAsyncTaskDone);
|
||||
|
||||
if (stuff->h.done()) {
|
||||
stuff->h.destroy();
|
||||
}
|
||||
|
||||
{
|
||||
InterruptLock lock;
|
||||
@@ -124,12 +116,10 @@ void enqueue(std::coroutine_handle<> h, AwaitableType type) {
|
||||
|
||||
{
|
||||
InterruptLock lock;
|
||||
TRACE(tracing::TraceEvent::kAsyncEnqueue);
|
||||
|
||||
const bool was_notified =
|
||||
std::exchange(notifications[ttype].pending, false);
|
||||
if (was_notified) {
|
||||
TRACE(tracing::TraceEvent::kAsyncAwaitWasNotified);
|
||||
schedule(h);
|
||||
return;
|
||||
}
|
||||
@@ -165,4 +155,4 @@ void resume(AwaitableType type) {
|
||||
delete stuff;
|
||||
}
|
||||
|
||||
} // namespace async
|
||||
} // namespace async
|
||||
@@ -4,61 +4,17 @@
|
||||
#include <coroutine>
|
||||
#include <utility>
|
||||
|
||||
#include "trace.h"
|
||||
|
||||
namespace async {
|
||||
|
||||
struct task_final_suspend {
|
||||
bool await_ready() noexcept(true) { return false; }
|
||||
void await_suspend(std::coroutine_handle<> h) noexcept(true) {
|
||||
struct continuation : std::suspend_always {
|
||||
void await_suspend(std::coroutine_handle<>) noexcept {
|
||||
if (parent) {
|
||||
TRACE(tracing::TraceEvent::kAsyncCallParent);
|
||||
parent();
|
||||
TRACE(tracing::TraceEvent::kAsyncCallParentDone);
|
||||
|
||||
if (parent && parent.done()) {
|
||||
TRACE(tracing::TraceEvent::kAsyncDestroy);
|
||||
parent.destroy();
|
||||
}
|
||||
parent.resume();
|
||||
}
|
||||
}
|
||||
void await_resume() noexcept(true) {}
|
||||
|
||||
std::coroutine_handle<> parent;
|
||||
};
|
||||
|
||||
template <typename T>
|
||||
struct gimme {
|
||||
// child interface
|
||||
bool await_ready() { return false; }
|
||||
void await_suspend(std::coroutine_handle<> h) {
|
||||
ha = h;
|
||||
waiting = true;
|
||||
TRACE(tracing::TraceEvent::kAsyncGimmeWaiting);
|
||||
}
|
||||
T await_resume() {
|
||||
waiting = false;
|
||||
TRACE(tracing::TraceEvent::kAsyncGimmeResume);
|
||||
return std::move(stuff);
|
||||
}
|
||||
|
||||
// parent interface
|
||||
void feed(T&& s) {
|
||||
if (!waiting) {
|
||||
__builtin_trap();
|
||||
}
|
||||
if (!ha) {
|
||||
__builtin_trap();
|
||||
}
|
||||
stuff = s;
|
||||
ha.resume();
|
||||
}
|
||||
|
||||
bool waiting = false;
|
||||
std::coroutine_handle<> ha;
|
||||
T stuff;
|
||||
};
|
||||
|
||||
template <typename T = void>
|
||||
struct task;
|
||||
|
||||
@@ -67,40 +23,37 @@ struct task<void> {
|
||||
struct promise_type;
|
||||
using handle_type = std::coroutine_handle<promise_type>;
|
||||
|
||||
~task() {
|
||||
if (h) {
|
||||
h.destroy();
|
||||
}
|
||||
}
|
||||
|
||||
struct promise_type {
|
||||
task get_return_object() {
|
||||
return {.h = handle_type::from_promise(*this)};
|
||||
}
|
||||
std::suspend_always initial_suspend() noexcept { return {}; }
|
||||
task_final_suspend final_suspend() noexcept {
|
||||
return {.parent = parent};
|
||||
}
|
||||
continuation final_suspend() noexcept { return {.parent = parent}; }
|
||||
void return_void() {}
|
||||
void unhandled_exception() {
|
||||
TRACE(tracing::TraceEvent::kAsyncException);
|
||||
}
|
||||
void unhandled_exception() {}
|
||||
|
||||
std::coroutine_handle<> parent;
|
||||
};
|
||||
|
||||
// awaitable
|
||||
bool await_ready() {
|
||||
TRACE(tracing::TraceEvent::kAsyncCoAwait);
|
||||
h();
|
||||
h.promise().parent = {};
|
||||
h.resume();
|
||||
if (h.done()) {
|
||||
TRACE(tracing::TraceEvent::kAsyncDestroy);
|
||||
h.destroy();
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
void await_suspend(std::coroutine_handle<> ha) {
|
||||
TRACE(tracing::TraceEvent::kAsyncSuspend);
|
||||
h.promise().parent = ha;
|
||||
}
|
||||
void await_suspend(std::coroutine_handle<> ha) { h.promise().parent = ha; }
|
||||
void await_resume() {}
|
||||
|
||||
std::coroutine_handle<promise_type> h;
|
||||
handle_type h;
|
||||
};
|
||||
|
||||
template <typename T>
|
||||
@@ -108,20 +61,22 @@ struct task {
|
||||
struct promise_type;
|
||||
using handle_type = std::coroutine_handle<promise_type>;
|
||||
|
||||
~task() {
|
||||
if (h) {
|
||||
h.destroy();
|
||||
}
|
||||
}
|
||||
|
||||
struct promise_type {
|
||||
task get_return_object() {
|
||||
return {.h = handle_type::from_promise(*this)};
|
||||
}
|
||||
std::suspend_always initial_suspend() noexcept { return {}; }
|
||||
task_final_suspend final_suspend() noexcept {
|
||||
return {.parent = parent};
|
||||
}
|
||||
continuation final_suspend() noexcept { return {.parent = parent}; }
|
||||
void return_value(T&& value) { ret_value = std::move(value); }
|
||||
void unhandled_exception() {
|
||||
TRACE(tracing::TraceEvent::kAsyncException);
|
||||
}
|
||||
void unhandled_exception() {}
|
||||
template <std::convertible_to<T> From>
|
||||
task_final_suspend yield_value(From&& value) {
|
||||
continuation yield_value(From&& value) {
|
||||
ret_value = std::forward<From>(value);
|
||||
result_ready = true;
|
||||
return {.parent = parent};
|
||||
@@ -135,34 +90,18 @@ struct task {
|
||||
// awaitable
|
||||
bool await_ready() {
|
||||
h.promise().parent = {};
|
||||
TRACE(tracing::TraceEvent::kAsyncCoAwait);
|
||||
h();
|
||||
if (h.promise().result_ready) {
|
||||
return true;
|
||||
}
|
||||
if (h.done()) {
|
||||
destroyed = true;
|
||||
ret_value = std::move(h.promise().ret_value);
|
||||
TRACE(tracing::TraceEvent::kAsyncDestroy);
|
||||
h.destroy();
|
||||
h.resume();
|
||||
if (h.promise().result_ready || h.done()) {
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
void await_suspend(std::coroutine_handle<> ha) {
|
||||
TRACE(tracing::TraceEvent::kAsyncSuspend);
|
||||
h.promise().parent = ha;
|
||||
}
|
||||
void await_suspend(std::coroutine_handle<> ha) { h.promise().parent = ha; }
|
||||
T await_resume() {
|
||||
if (!destroyed) {
|
||||
h.promise().result_ready = false;
|
||||
return std::move(h.promise().ret_value);
|
||||
}
|
||||
return std::move(ret_value);
|
||||
h.promise().result_ready = false;
|
||||
return std::move(h.promise().ret_value);
|
||||
}
|
||||
|
||||
bool destroyed = false;
|
||||
T ret_value;
|
||||
std::coroutine_handle<promise_type> h;
|
||||
};
|
||||
|
||||
@@ -205,4 +144,50 @@ inline auto delay(int ms) {
|
||||
return awaitable{ms};
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
struct gimme {
|
||||
// child interface
|
||||
bool await_ready() { return false; }
|
||||
void await_suspend(std::coroutine_handle<> h) {
|
||||
ha = h;
|
||||
waiting = true;
|
||||
if (parent) {
|
||||
schedule(parent);
|
||||
}
|
||||
}
|
||||
T await_resume() {
|
||||
waiting = false;
|
||||
return std::move(stuff);
|
||||
}
|
||||
|
||||
// parent interface
|
||||
auto feed(T&& s) {
|
||||
struct awaitable {
|
||||
bool await_ready() {
|
||||
g.parent = {};
|
||||
g.ha.resume();
|
||||
return g.waiting;
|
||||
}
|
||||
void await_suspend(std::coroutine_handle<> h) { g.parent = h; }
|
||||
void await_resume() {}
|
||||
|
||||
gimme<T>& g;
|
||||
};
|
||||
|
||||
if (!waiting) {
|
||||
__builtin_trap();
|
||||
}
|
||||
if (!ha) {
|
||||
__builtin_trap();
|
||||
}
|
||||
stuff = std::move(s);
|
||||
return awaitable{.g = *this};
|
||||
}
|
||||
|
||||
bool waiting = false;
|
||||
std::coroutine_handle<> ha;
|
||||
std::coroutine_handle<> parent;
|
||||
T stuff;
|
||||
};
|
||||
|
||||
} // namespace async
|
||||
@@ -1,7 +1,7 @@
|
||||
#pragma once
|
||||
|
||||
#ifndef __x86_64__
|
||||
#include "interrupts.h"
|
||||
#include "hal/interrupts.h"
|
||||
|
||||
struct InterruptLock {
|
||||
bool was_on;
|
||||
@@ -1,6 +1,5 @@
|
||||
#pragma once
|
||||
|
||||
#include <atomic>
|
||||
#include <span>
|
||||
|
||||
#include "lock.h"
|
||||
@@ -8,9 +7,9 @@
|
||||
struct RingBuffer {
|
||||
std::span<std::byte> buffer;
|
||||
|
||||
std::atomic<size_t> read_ptr = 0;
|
||||
std::atomic<size_t> write_ptr = 0;
|
||||
std::atomic<bool> full = 0;
|
||||
size_t read_ptr = 0;
|
||||
size_t write_ptr = 0;
|
||||
size_t used = 0;
|
||||
|
||||
bool Store(std::span<const std::byte> data) {
|
||||
InterruptLock lock;
|
||||
@@ -53,9 +52,7 @@ struct RingBuffer {
|
||||
return false;
|
||||
}
|
||||
write_ptr = (write_ptr + amount) % buffer.size();
|
||||
if (read_ptr == write_ptr) {
|
||||
full = true;
|
||||
}
|
||||
used = used + amount;
|
||||
return true;
|
||||
}
|
||||
|
||||
@@ -66,25 +63,20 @@ struct RingBuffer {
|
||||
return false;
|
||||
}
|
||||
read_ptr = (read_ptr + amount) % buffer.size();
|
||||
if (amount > 0) {
|
||||
full = false;
|
||||
}
|
||||
used = used - amount;
|
||||
return true;
|
||||
}
|
||||
|
||||
size_t FreeSpace() const {
|
||||
InterruptLock lock;
|
||||
|
||||
return buffer.size() - AvailableData();
|
||||
return buffer.size() - used;
|
||||
}
|
||||
|
||||
size_t AvailableData() const {
|
||||
InterruptLock lock;
|
||||
|
||||
if (read_ptr == write_ptr) {
|
||||
return full ? buffer.size() : 0;
|
||||
}
|
||||
return (buffer.size() + write_ptr - read_ptr) % buffer.size();
|
||||
return used;
|
||||
}
|
||||
|
||||
uint8_t* RawReadPointer() const {
|
||||
@@ -93,16 +85,21 @@ struct RingBuffer {
|
||||
return reinterpret_cast<uint8_t*>(buffer.data() + read_ptr);
|
||||
}
|
||||
|
||||
uint8_t* RawWritePointer() const {
|
||||
InterruptLock lock;
|
||||
|
||||
return reinterpret_cast<uint8_t*>(buffer.data() + write_ptr);
|
||||
}
|
||||
|
||||
size_t ContiguousFreeSpace() const {
|
||||
InterruptLock lock;
|
||||
|
||||
return std::min(FreeSpace(), buffer.size() - write_ptr);
|
||||
}
|
||||
|
||||
size_t ContiguousAvailableData() const {
|
||||
InterruptLock lock;
|
||||
|
||||
if (read_ptr < write_ptr) {
|
||||
return AvailableData();
|
||||
}
|
||||
if (full) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return buffer.size() - read_ptr;
|
||||
return std::min(AvailableData(), buffer.size() - read_ptr);
|
||||
}
|
||||
};
|
||||
62
mbv/testecho.py
Normal file
62
mbv/testecho.py
Normal file
@@ -0,0 +1,62 @@
|
||||
import argparse
|
||||
import random
|
||||
import serial
|
||||
import sys
|
||||
import threading
|
||||
import time
|
||||
|
||||
tty = "/dev/ttyUSB1"
|
||||
baud = 115200
|
||||
|
||||
|
||||
def sendrecv(s, size, timeout=5):
|
||||
"""Send some data and recv until the same data was received back."""
|
||||
data = random.randbytes(size)
|
||||
return sendcheck(s, data, timeout)
|
||||
|
||||
|
||||
def sendcheck(s, data, timeout=5):
|
||||
s.write(data)
|
||||
received = 0
|
||||
start = time.time()
|
||||
got = bytearray()
|
||||
while received < len(data):
|
||||
r = s.read()
|
||||
got += r
|
||||
try:
|
||||
assert(r == data[received: received + len(r)])
|
||||
assert(time.time() < start + timeout)
|
||||
except:
|
||||
fr = received - 10
|
||||
to = received + len(r) + 1
|
||||
sdat = data[fr: to]
|
||||
rdat = bytes(got[fr: to])
|
||||
print(f"failed after receiving {received} correct bytes")
|
||||
print(f"expected {sdat}")
|
||||
print(f" got {rdat}")
|
||||
sys.exit(-1)
|
||||
|
||||
received += len(r)
|
||||
|
||||
|
||||
def parse_args():
|
||||
parser = argparse.ArgumentParser()
|
||||
return parser.parse_args()
|
||||
|
||||
|
||||
def main():
|
||||
args = parse_args()
|
||||
|
||||
s = serial.Serial(tty, baud, timeout=1)
|
||||
for i in range(12):
|
||||
size = 2**i
|
||||
print(f"Trying with {size} bytes")
|
||||
sendrecv(s, size)
|
||||
data = b'ze%s\x96:M#\xd8\x98\x9d\x96\xf5?\x80c\xc6\xa7\x03\xe0i\x04V\xcb\xa3\x95#GC\xabf\x98'
|
||||
#sendcheck(s, data)
|
||||
|
||||
print("All sizes passed.")
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
@@ -1490,7 +1490,7 @@ def parse_tree(tree, debug=False):
|
||||
|
||||
def larkparse(f, debug=False):
|
||||
with open(GRAMMAR_FILE) as g:
|
||||
asparser = lark.Lark(g.read())
|
||||
asparser = lark.Lark(g.read(), maybe_placeholders=False)
|
||||
data = f.read()
|
||||
if isinstance(data, bytes):
|
||||
data = data.decode()
|
||||
|
||||
@@ -69,7 +69,7 @@ def dump(secmap):
|
||||
|
||||
|
||||
def parse_args():
|
||||
parser = argparse.ArgumentParser(description='Assemble.')
|
||||
parser = argparse.ArgumentParser(description='Link.')
|
||||
parser.add_argument('--debug', action='store_true',
|
||||
help='print debug info')
|
||||
parser.add_argument('objfiles', metavar='O', nargs='+',
|
||||
|
||||
17
wave/Makefile
Normal file
17
wave/Makefile
Normal file
@@ -0,0 +1,17 @@
|
||||
all: sim
|
||||
sim: pdmout_test.ghw square_test.ghw wave_test.ghw
|
||||
|
||||
sim_sources = pdmout_test.vhdl square_test.vhdl wave_test.vhdl
|
||||
sources = pdmout.vhdl square.vhdl wave.vhdl pdm.vhdl
|
||||
|
||||
|
||||
%.ghw: work-obj93.cf
|
||||
ghdl -r $* --wave=$@
|
||||
|
||||
|
||||
work-obj93.cf: $(sim_sources) $(sources)
|
||||
ghdl -a $^
|
||||
|
||||
PHONY: sim
|
||||
|
||||
.PRECIOUS: test.ghw
|
||||
@@ -1,17 +0,0 @@
|
||||
all: sim
|
||||
sim: pdmout_test.ghw square_test.ghw
|
||||
|
||||
sim_sources = pdmout_test.vhdl square_test.vhdl
|
||||
sources = pdmout.vhdl square.vhdl
|
||||
|
||||
|
||||
%.ghw: work-obj93.cf
|
||||
ghdl -r $* --wave=$@
|
||||
|
||||
|
||||
work-obj93.cf: $(sim_sources) $(sources)
|
||||
ghdl -a $^
|
||||
|
||||
PHONY: sim
|
||||
|
||||
.PRECIOUS: test.ghw
|
||||
46
wave/pdm.vhdl
Normal file
46
wave/pdm.vhdl
Normal file
@@ -0,0 +1,46 @@
|
||||
library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
use ieee.numeric_std.all;
|
||||
|
||||
entity pdm is
|
||||
port
|
||||
(
|
||||
clk : in std_logic;
|
||||
rst : in std_logic;
|
||||
|
||||
-- hardware
|
||||
out_pin : out std_logic;
|
||||
|
||||
-- input interface
|
||||
enabled : in std_logic;
|
||||
sample : in std_logic_vector(15 downto 0)
|
||||
);
|
||||
end pdm;
|
||||
|
||||
architecture Behavioral of pdm is
|
||||
|
||||
signal feedback: signed(16 downto 0);
|
||||
|
||||
begin
|
||||
|
||||
-- PDM process
|
||||
-- drives pin_out, feedback
|
||||
process(clk, rst)
|
||||
begin
|
||||
|
||||
if rst = '1' then
|
||||
feedback <= to_signed(0, 17);
|
||||
out_pin <= '0';
|
||||
elsif rising_edge(clk) and enabled = '1' then
|
||||
if feedback > 0 then
|
||||
out_pin <= '1';
|
||||
feedback <= feedback + signed("0" & sample) - ("0" & x"ffff");
|
||||
else
|
||||
out_pin <= '0';
|
||||
feedback <= feedback + signed("0" & sample);
|
||||
end if;
|
||||
end if;
|
||||
|
||||
end process;
|
||||
|
||||
end Behavioral;
|
||||
175
wave/wave.vhdl
Normal file
175
wave/wave.vhdl
Normal file
@@ -0,0 +1,175 @@
|
||||
library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
use ieee.numeric_std.all;
|
||||
|
||||
-- some kind of square wave generator, with PDM output
|
||||
entity wave is
|
||||
port
|
||||
(
|
||||
-- AXI4 slave interface
|
||||
aclk : in std_logic;
|
||||
aresetn : in std_logic;
|
||||
|
||||
-- read addr
|
||||
araddr : in std_logic_vector(31 downto 0);
|
||||
arvalid : in std_logic;
|
||||
arready : out std_logic;
|
||||
|
||||
-- read data
|
||||
rdata : out std_logic_vector(31 downto 0);
|
||||
rresp : out std_logic;
|
||||
rvalid : out std_logic;
|
||||
rready : in std_logic;
|
||||
|
||||
-- write addr
|
||||
awaddr : in std_logic_vector(31 downto 0);
|
||||
awvalid : in std_logic;
|
||||
awready : out std_logic;
|
||||
|
||||
-- write data
|
||||
wdata : in std_logic_vector(31 downto 0);
|
||||
wstrb : in std_logic_vector(3 downto 0);
|
||||
|
||||
-- write resp
|
||||
bresp : out std_logic;
|
||||
bvalid : out std_logic;
|
||||
bready : in std_logic;
|
||||
|
||||
|
||||
-- PDM output!
|
||||
pdmout : out std_logic
|
||||
);
|
||||
end wave;
|
||||
|
||||
--
|
||||
-- Mem layout:
|
||||
-- 0x00: control: [bit0: enabled]
|
||||
-- 0x04: 32-bit unsigned period (in clock cycles)
|
||||
-- 0x08: 16-bit unsigned high value (high 16 bits ignored)
|
||||
-- 0x0c: 16-bit unsigned low value (high 16 bits ignored)
|
||||
|
||||
architecture Behavioral of wave is
|
||||
|
||||
component pdm is
|
||||
port
|
||||
(
|
||||
clk : in std_logic;
|
||||
rst : in std_logic;
|
||||
|
||||
-- hardware
|
||||
out_pin : out std_logic;
|
||||
|
||||
-- input interface
|
||||
enabled : in std_logic;
|
||||
sample : in std_logic_vector(15 downto 0)
|
||||
);
|
||||
end component;
|
||||
|
||||
-- all registers
|
||||
signal period, hi_val, lo_val, sample: std_logic_vector(15 downto 0);
|
||||
signal enabled, rst, onwrite: std_logic;
|
||||
signal counter: unsigned(23 downto 0);
|
||||
|
||||
begin
|
||||
|
||||
arready <= '1';
|
||||
awready <= '1';
|
||||
rst <= not aresetn;
|
||||
|
||||
pdm0: pdm port map(clk => aclk, rst => rst, out_pin => pdmout,
|
||||
sample => sample, enabled => enabled);
|
||||
|
||||
-- main process
|
||||
-- drives counter, sample
|
||||
process(aclk, aresetn)
|
||||
variable high: std_logic;
|
||||
begin
|
||||
|
||||
if aresetn = '0' then
|
||||
counter <= to_unsigned(0, 24);
|
||||
sample <= x"0000";
|
||||
high := '0';
|
||||
elsif rising_edge(aclk) then
|
||||
counter <= to_unsigned(0, 24);
|
||||
if high = '1' then
|
||||
sample <= hi_val;
|
||||
else
|
||||
sample <= lo_val;
|
||||
end if;
|
||||
|
||||
if enabled = '1' and unsigned(period) /= 0 and onwrite = '0' then
|
||||
if counter(22 downto 7) = unsigned(period) - 1
|
||||
and counter(6 downto 0) = x"7f" then
|
||||
high := not high;
|
||||
else
|
||||
counter <= counter + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
|
||||
end process;
|
||||
|
||||
-- Bus slave process
|
||||
-- drives period, value, out_addr, enabled, onwrite
|
||||
process(aclk, aresetn)
|
||||
-- 00: control, 01: period, 02: high, 03: low
|
||||
variable waddr: std_logic_vector(2 downto 0);
|
||||
variable raddr: std_logic_vector(2 downto 0);
|
||||
begin
|
||||
|
||||
if aresetn = '0' then
|
||||
period <= x"0000";
|
||||
hi_val <= x"0000";
|
||||
lo_val <= x"0000";
|
||||
enabled <= '0';
|
||||
waddr := "000";
|
||||
|
||||
elsif rising_edge(aclk) then
|
||||
|
||||
rvalid <= '0';
|
||||
rdata <= x"00000000";
|
||||
rresp <= '0';
|
||||
bvalid <= '0';
|
||||
bresp <= '0';
|
||||
onwrite <= '0';
|
||||
|
||||
if arvalid = '1' then
|
||||
raddr := araddr(4 downto 2);
|
||||
end if;
|
||||
if awvalid = '1' then
|
||||
waddr := awaddr(4 downto 2);
|
||||
end if;
|
||||
if arvalid = '1' then
|
||||
case waddr(1 downto 0) is
|
||||
when "00" =>
|
||||
rdata(0) <= enabled;
|
||||
when "01" =>
|
||||
rdata(23 downto 8) <= period;
|
||||
when "10" =>
|
||||
rdata(15 downto 0) <= hi_val;
|
||||
when "11" =>
|
||||
rdata(15 downto 0) <= lo_val;
|
||||
when others =>
|
||||
end case;
|
||||
rvalid <= '1';
|
||||
end if;
|
||||
if unsigned(wstrb) > 0 then
|
||||
case waddr(1 downto 0) is
|
||||
when "00" =>
|
||||
enabled <= wdata(0);
|
||||
when "01" =>
|
||||
period <= wdata(23 downto 8);
|
||||
when "10" =>
|
||||
hi_val <= wdata(15 downto 0);
|
||||
when "11" =>
|
||||
lo_val <= wdata(15 downto 0);
|
||||
when others =>
|
||||
end case;
|
||||
bvalid <= '1';
|
||||
onwrite <= '1';
|
||||
end if;
|
||||
end if;
|
||||
|
||||
end process;
|
||||
|
||||
end Behavioral;
|
||||
165
wave/wave_test.vhdl
Normal file
165
wave/wave_test.vhdl
Normal file
@@ -0,0 +1,165 @@
|
||||
library ieee;
|
||||
use ieee.std_logic_1164.all;
|
||||
use ieee.numeric_std.all;
|
||||
use std.textio.all;
|
||||
|
||||
entity wave_test is
|
||||
end wave_test;
|
||||
|
||||
architecture rtl of wave_test is
|
||||
|
||||
component wave is
|
||||
port
|
||||
(
|
||||
-- AXI4 slave interface
|
||||
aclk : in std_logic;
|
||||
aresetn : in std_logic;
|
||||
|
||||
-- read addr
|
||||
araddr : in std_logic_vector(31 downto 0);
|
||||
arvalid : in std_logic;
|
||||
arready : out std_logic;
|
||||
|
||||
-- read data
|
||||
rdata : out std_logic_vector(31 downto 0);
|
||||
rresp : out std_logic;
|
||||
rvalid : out std_logic;
|
||||
rready : in std_logic;
|
||||
|
||||
-- write addr
|
||||
awaddr : in std_logic_vector(31 downto 0);
|
||||
awvalid : in std_logic;
|
||||
awready : out std_logic;
|
||||
|
||||
-- write data
|
||||
wdata : in std_logic_vector(31 downto 0);
|
||||
wstrb : in std_logic_vector(3 downto 0);
|
||||
|
||||
-- write resp
|
||||
bresp : out std_logic;
|
||||
bvalid : out std_logic;
|
||||
bready : in std_logic;
|
||||
|
||||
|
||||
-- PDM output!
|
||||
pdmout : out std_logic
|
||||
);
|
||||
end component;
|
||||
|
||||
signal finished, clk, rst, rstn: std_logic := '0';
|
||||
|
||||
signal arvalid, arready, awvalid, awready: std_logic;
|
||||
signal rresp, rvalid, rready, bresp, bvalid, bready: std_logic;
|
||||
signal wstrb: std_logic_vector(3 downto 0);
|
||||
signal araddr, rdata, awaddr, wdata: std_logic_vector(31 downto 0);
|
||||
|
||||
signal pdmout: std_logic;
|
||||
|
||||
constant period: integer := 7 * 256;
|
||||
constant half_time: time := 1280 ns * period;
|
||||
|
||||
begin
|
||||
rstn <= not rst;
|
||||
dut: wave port map(aclk => clk, aresetn => rstn,
|
||||
arvalid => arvalid, arready => arready, awvalid => awvalid, awready => awready,
|
||||
rresp => rresp, rvalid => rvalid, rready => rready, bresp => bresp, bvalid => bvalid, bready => bready,
|
||||
wstrb => wstrb, araddr => araddr, rdata => rdata, awaddr => awaddr, wdata => wdata,
|
||||
pdmout => pdmout
|
||||
);
|
||||
|
||||
-- tick tock
|
||||
process
|
||||
begin
|
||||
if finished = '0' then
|
||||
clk <= not clk;
|
||||
wait for 5 ns;
|
||||
else
|
||||
clk <= '0';
|
||||
wait;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
process
|
||||
begin
|
||||
rst <= '1';
|
||||
|
||||
arvalid <= '0';
|
||||
awvalid <= '0';
|
||||
wstrb <= "0000";
|
||||
|
||||
wait for 1 ns;
|
||||
-- assert(='0') report "Fail rst" severity error;
|
||||
|
||||
rst <= '0';
|
||||
|
||||
wait for 10 ns;
|
||||
|
||||
awvalid <= '1';
|
||||
awaddr <= x"00000000"; -- enable
|
||||
wstrb <= "1111";
|
||||
wdata <= x"00000001";
|
||||
bready <= '1';
|
||||
|
||||
wait for 10 ns;
|
||||
assert(bvalid = '1') report "Write error" severity error;
|
||||
assert(bresp = '0') report "Write fail" severity error;
|
||||
assert(awready = '1') report "Write error" severity error;
|
||||
|
||||
awaddr <= x"00000004"; -- period
|
||||
wdata <= std_logic_vector(to_unsigned(period, 32));
|
||||
|
||||
wait for 10 ns;
|
||||
|
||||
-- read back
|
||||
wstrb <= "0000";
|
||||
awvalid <= '0';
|
||||
arvalid <= '1';
|
||||
araddr <= x"00000004";
|
||||
rready <= '1';
|
||||
|
||||
wait for 10 ns;
|
||||
assert(unsigned(rdata) = period) report "Period readback failed" severity error;
|
||||
|
||||
arvalid <= '0';
|
||||
awvalid <= '1';
|
||||
wstrb <= "1111";
|
||||
|
||||
awaddr <= x"00000008"; -- high
|
||||
wdata <= x"00008000";
|
||||
|
||||
wait for 10 ns;
|
||||
|
||||
awaddr <= x"0000000c"; -- low
|
||||
wdata <= x"00004000";
|
||||
|
||||
wait for 10 ns;
|
||||
|
||||
wstrb <= "0000";
|
||||
awvalid <= '0';
|
||||
|
||||
wait for 30 ns;
|
||||
assert(pdmout = '1') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '0') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '0') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '1') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '0') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '0') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '0') report "wrong pdmout" severity error;
|
||||
wait for 10 ns;
|
||||
assert(pdmout = '1') report "wrong pdmout" severity error;
|
||||
|
||||
wait for 100 us;
|
||||
|
||||
assert false report "Test done." severity note;
|
||||
|
||||
finished <= '1';
|
||||
wait;
|
||||
|
||||
end process;
|
||||
end rtl;
|
||||
Reference in New Issue
Block a user