synth/cpu
Paul Mathieu 36bc1417b6 cpu: more instruction pipelining
This is needed to make WNS room for fetching instructions from SRAM.
2021-04-17 23:02:58 -07:00
..
alu.vhdl Exctract cpu into its own module 2021-03-06 16:37:42 -08:00
cpu_test.vhdl cpu: wait when mem_busy is high 2021-03-06 19:11:11 -08:00
cpu.vhdl cpu: more instruction pipelining 2021-04-17 23:02:58 -07:00
makefile Exctract cpu into its own module 2021-03-06 16:37:42 -08:00
reg.vhdl Exctract cpu into its own module 2021-03-06 16:37:42 -08:00