64 lines
1.9 KiB
C
64 lines
1.9 KiB
C
/******************************************************************************
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* Copyright (C) 2002 - 2022 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/****************************************************************************/
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/**
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*
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* @file xuartlite_g.c
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* @addtogroup uartlite_v3_7
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* @{
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*
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* This file contains a configuration table that specifies the configuration of
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* UART Lite devices in the system. Each device in the system should have an
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* entry in the table.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a ecm 08/31/01 First release
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* 1.00b jhl 02/21/02 Repartitioned the driver for smaller files
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* </pre>
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*
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******************************************************************************/
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/***************************** Include Files *********************************/
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#include "xuartlite.h"
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#include "xparameters.h"
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/************************** Variable Prototypes ******************************/
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/**
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* The configuration table for UART Lite devices
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*/
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XUartLite_Config XUartLite_ConfigTable[XPAR_XUARTLITE_NUM_INSTANCES] =
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{
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{
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XPAR_UARTLITE_0_DEVICE_ID, /* Unique ID of device */
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XPAR_UARTLITE_0_BASEADDR, /* Device base address */
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XPAR_UARTLITE_0_BAUDRATE, /* Fixed baud rate */
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XPAR_UARTLITE_0_USE_PARITY, /* Fixed parity */
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XPAR_UARTLITE_0_ODD_PARITY, /* Fixed parity type */
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XPAR_UARTLITE_0_DATA_BITS /* Fixed data bits */
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},
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};
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/** @} */
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