wave: axi4-compliant wave

There's still a glitch/race somewhere.

mbv/.clang-format

@@ -0,0 +1,9 @@
+---
+# We'll use defaults from the LLVM style, but with 4 columns indentation.
+BasedOnStyle: Google
+IndentWidth: 4
+---
+Language: Cpp
+# Force pointers to the type for C++.
+DerivePointerAlignment: false
+PointerAlignment: Left

mbv/Makefile

@@ -14,6 +14,10 @@ timer:  ## Build the timer app in docker
 uart:  ## Build the uart app in docker
 	docker build -o . --target export --build-arg TARGET=uart.bin .
 
+.PHONY: async
+async:  ## Build the async app in docker
+	docker build -o . --target export --build-arg TARGET=async.bin .
+
 .PHONY: dev-image
 dev-image:
 	docker build -t mbv-dev --target dev .
@@ -22,16 +26,20 @@ dev-image:
 dev: dev-image  ## Run a dev container
 	docker run -it --rm -v $(CURDIR):/workspace -w /workspace mbv-dev
 
+.PHONY: precommit
+precommit:		## Make sure everything looks ok before pushing
+	$(MAKE) bootloader
+	$(MAKE) helloworld
+	$(MAKE) timer
+	$(MAKE) uart
+	$(MAKE) async
+
 .PHONY: clean
 clean:  ## Remove generated files
-	rm -rf *.elf *.bin $(all_objects) $(deps)
+	rm -rf *.elf *.bin
-	rm -rf test/ *.dSYM $(test_deps) *.o
 
 .PHONY: help
 help:           ## Show this help
 	@echo Noteworthy targets:
 	@egrep '^[a-zA-Z_-]+:.*?## .*$$' $(firstword $(MAKEFILE_LIST)) | sort | awk 'BEGIN {FS = ":.*?## "}; {printf "\033[36m%-20s\033[0m %s\n", $$1, $$2}'
 .DEFAULT_GOAL := help
-
-#-include $(deps)
-#-include $(test_deps)

mbv/apps/app.ld

@@ -21,6 +21,13 @@ SECTIONS
         *(.rodata*)
     } > RAM
 
+    .init :
+    {
+        __init_array_start = .;
+        KEEP(*(.init_array*))
+        __init_array_end = .;
+    }
+
     .bss (NOLOAD) :
     {
         _bss_begin = .;

mbv/apps/async/main.cc

@@ -0,0 +1,175 @@
+#include "hal/gpio.h"
+#include "hal/intc.h"
+#include "hal/interrupts.h"
+#include "hal/pol0.h"
+#include "hal/timer.h"
+#include "lib/async.h"
+#include "lib/buffer.h"
+
+#include "uart.h"
+#include "uart_async.h"
+
+namespace {
+
+constexpr uint32_t kTicksPerSecond = 100'000'000;
+constexpr uint32_t kTicksPerMicrosecond = 100;
+constexpr uint32_t kOverflowSeconds = (1ULL << 32) / kTicksPerSecond;
+constexpr uint32_t kOverflowMicroseconds =
+    ((1ULL << 32) % kTicksPerSecond) / kTicksPerMicrosecond;
+
+Timer* timer0;
+volatile uint32_t t1overflowsecs = 0;
+volatile uint32_t t1overflowusecs = 0;
+
+Gpio* gpio0;
+
+void ToggleLed(int which) {
+    uint8_t data = gpio0->data;
+    data ^= (0x1 << which);
+    gpio0->data = data;
+}
+
+void SetLed(int which) {
+    uint8_t data = gpio0->data;
+    data |= (0x1 << which);
+    gpio0->data = data;
+}
+
+void ClearLed(int which) {
+    uint8_t data = gpio0->data;
+    data &= ~(0x1 << which);
+    gpio0->data = data;
+}
+
+void Uart0Isr() { HandleUartIsr(); }
+
+void Timer0Isr() {
+    if (timer0->HasT1Overflowed()) {
+        UartWriteCrash("t1 overflow\r\n");
+        t1overflowsecs += kOverflowSeconds;
+        t1overflowusecs += kOverflowMicroseconds;
+        timer0->ClearT1Overflow();
+        return;
+    }
+    SetLed(6);
+    UartWriteCrash("blarg\r\n");
+    __builtin_trap();
+}
+
+void SetupUart() {
+    InitUarts();
+
+    intc::SetIsr(UART0_IRQN, Uart0Isr);
+    intc::SetIrqEnabled(UART0_IRQN, true);
+}
+
+void SetupTimer() {
+    timer0 = Timer::Instance(TIMER0_BASE);
+    timer0->SetupAsWdt(100'000 * 1000);
+    timer0->EnableT1();
+
+    intc::SetIsr(TIMER0_IRQN, Timer0Isr);
+    intc::SetIrqEnabled(TIMER0_IRQN, true);
+}
+
+void SetupInterrupts() {
+    intc::EnableInterrupts();
+    SetExternalInterruptHandler(intc::InterruptHandler);
+    EnableExternalInterrupts();
+    EnableInterrupts(true);
+}
+
+async::task<> echo() {
+    async::task<std::byte> reader = UartReadLoop();
+    async::gimme<std::span<const std::byte>> feeder;
+    async::task<> writer = UartWriteLoop(feeder);
+    writer.h.resume();  // advance to first yield
+    while (1) {
+        SetLed(1);
+        std::byte c = co_await reader;
+        ClearLed(1);
+        co_await feeder.feed(std::span{&c, 1});
+    }
+}
+
+async::task<> blink() {
+    while (1) {
+        co_await async::delay(500);
+        ToggleLed(0);
+        timer0->Pet();
+
+        co_await UartWrite(".");
+    }
+}
+
+}  // namespace
+
+int main() {
+    gpio0 = Gpio::Instance(GPIO0_BASE);
+    gpio0->data = 0;
+
+    SetupUart();
+    UartWriteBlocking("uart setup done\r\n");
+    SetupTimer();
+    UartWriteBlocking("timer setup done\r\n");
+
+    SetupInterrupts();
+
+    auto e = echo();
+    auto b = blink();
+    async::schedule(e.h);
+    async::schedule(b.h);
+
+    UartWriteBlocking("init done. starting main loop\r\n");
+
+    async::main_loop([]() {
+        return false;
+    });
+    // should never get here
+}
+
+/// stdlib stuff
+
+#include <sys/time.h>
+
+#include <cstdint>
+
+#include "lib/lock.h"
+
+extern unsigned char _heap_begin, _heap_end;
+
+extern "C" void* _sbrk(int increment) {
+    static unsigned char* heap = &_heap_begin;
+    unsigned char* prev_heap = heap;
+    if (heap + increment >= &_heap_end) {
+        UartWriteCrash("Heap overflow!\r\n");
+        return reinterpret_cast<void*>(-1);
+    }
+    heap += increment;
+    return prev_heap;
+}
+
+extern "C" int _gettimeofday(struct timeval* tv, void* tzvp) {
+    (void)tzvp;
+    uint32_t ticks = timer0->GetT1Ticks();
+    tv->tv_sec = ticks / kTicksPerSecond + t1overflowsecs;
+    tv->tv_usec =
+        (ticks % kTicksPerSecond) / kTicksPerMicrosecond + t1overflowusecs;
+
+    return 0;
+}
+
+extern "C" uint8_t __atomic_exchange_1(volatile void* ptr, uint8_t val,
+                                       int memorder) {
+    (void)memorder;
+    auto* dest = reinterpret_cast<volatile uint8_t*>(ptr);
+    bool ret;
+
+    {
+        InterruptLock lock;
+        ret = *dest;
+        *dest = val;
+    }
+
+    return ret;
+}

mbv/apps/async/uart.cc

@@ -0,0 +1,166 @@
+#include "uart.h"
+
+#include "hal/gpio.h"
+#include "hal/pol0.h"
+#include "lib/async.h"
+#include "lib/lock.h"
+#include "lib/ring_buffer.h"
+#include "xuartlite.h"
+
+#include "uart_async.h"
+
+namespace {
+using async::AwaitableType;
+
+constexpr uintptr_t kUart0BaseAddress = UART0_BASE;
+XUartLite uart0_inst;
+XUartLite_Config uart0_config = {
+    .DeviceId = 0,
+    .RegBaseAddr = kUart0BaseAddress,
+    .BaudRate = 115200,
+    .UseParity = false,
+    .DataBits = 8,
+};
+
+constexpr size_t kUartRxBufferSize = 256;
+std::array<std::byte, kUartRxBufferSize> rx_buffer = {};
+RingBuffer rx_ring_buffer{.buffer = rx_buffer};
+
+constexpr size_t kUartTxBufferSize = 256;
+std::array<std::byte, kUartTxBufferSize> tx_buffer = {};
+RingBuffer tx_ring_buffer{.buffer = tx_buffer};
+
+XUartLite* uart0 = &uart0_inst;
+
+volatile bool sending;
+
+void StartReceiving() {
+    while (1) {
+        if (rx_ring_buffer.FreeSpace() < 1) {
+            // woops, full. discard some data
+            // TODO: keep track of overrun stats
+            rx_ring_buffer.Pop(1);
+        }
+        if (XUartLite_Recv(uart0, rx_ring_buffer.RawWritePointer(), 1) < 1) {
+            break;
+        }
+        rx_ring_buffer.Push(1);
+    }
+}
+
+void StartSending() {
+    if (sending) {
+        return;
+    }
+    size_t tosend = tx_ring_buffer.ContiguousAvailableData();
+    if (tosend < 1) {
+        return;
+    }
+    sending = true;
+    XUartLite_Send(uart0, tx_ring_buffer.RawReadPointer(), tosend);
+}
+}  // namespace
+
+void InitUarts() {
+    XUartLite_CfgInitialize(uart0, &uart0_config, uart0_config.RegBaseAddr);
+
+    XUartLite_SetSendHandler(uart0, HandleUartTxFromIsr, nullptr);
+    XUartLite_SetRecvHandler(uart0, HandleUartRxFromIsr, nullptr);
+    StartReceiving();
+    XUartLite_EnableInterrupt(uart0);
+
+    sending = false;
+}
+
+void UartWriteCrash(std::span<const std::byte> data) {
+    XUartLite_DisableInterrupt(uart0);
+    while (data.size() > 0) {
+        while (XUartLite_IsSending(uart0)) {
+        }
+        auto* dat =
+            reinterpret_cast<uint8_t*>(const_cast<std::byte*>(data.data()));
+        uint8_t sent = XUartLite_Send(uart0, dat, data.size());
+        data = data.subspan(sent);
+    }
+    while (XUartLite_IsSending(uart0)) {
+    }
+    XUartLite_Send(uart0, nullptr,
+                   0);  // reset buffer before enabling interrupts
+    XUartLite_EnableInterrupt(uart0);
+}
+
+async::task<> UartWrite(std::span<const std::byte> data) {
+    while (!tx_ring_buffer.Store(data)) {
+        co_await async::await(AwaitableType::kUartTx);
+    }
+
+    {
+        InterruptLock lock;
+        StartSending();
+    }
+}
+
+async::task<> UartWriteLoop(
+    async::gimme<std::span<const std::byte>>& data_gen) {
+    while (1) {
+        auto data = co_await data_gen;
+        while (!tx_ring_buffer.Store(data)) {
+            co_await async::await(AwaitableType::kUartTx);
+        }
+
+        {
+            InterruptLock lock;
+            StartSending();
+        }
+    }
+}
+
+// TODO: use chunks to allow receiving more than 256 bytes at once
+void UartReadBlocking(std::span<std::byte> data) {
+    while (!rx_ring_buffer.Load(data)) {
+    }
+}
+
+void UartWriteBlocking(std::span<const std::byte> data) {
+    while (!tx_ring_buffer.Store(data)) {
+    }
+
+    {
+        InterruptLock lock;
+        StartSending();
+    }
+}
+
+async::task<std::byte> UartReadLoop() {
+    std::byte c;
+    while (1) {
+        while (!rx_ring_buffer.Load(std::span{&c, 1})) {
+            co_await async::await(AwaitableType::kUartRx);
+        }
+
+        co_yield c;
+    }
+}
+
+async::task<buffer> UartRead(int size) {
+    auto buff = buffer::make(size);
+    while (!rx_ring_buffer.Load(buff.data)) {
+        co_await async::await(AwaitableType::kUartRx);
+    }
+    co_return buff;
+}
+
+void HandleUartTxFromIsr(void*, unsigned int transmitted) {
+    sending = false;
+    tx_ring_buffer.Pop(transmitted);
+    StartSending();
+    async::resume(AwaitableType::kUartTx);
+}
+
+void HandleUartRxFromIsr(void*, unsigned int transmitted) {
+    rx_ring_buffer.Push(transmitted);
+    StartReceiving();
+    async::resume(AwaitableType::kUartRx);
+}
+
+void HandleUartIsr() { XUartLite_InterruptHandler(uart0); }

mbv/apps/async/uart.h

@@ -0,0 +1,35 @@
+#pragma once
+
+#include <cstdint>
+#include <span>
+#include <string_view>
+
+void InitUarts();
+
+// block until the provided buffer is full
+void UartReadBlocking(std::span<std::byte> data);
+inline uint8_t UartReadByteBlocking() {
+    std::byte byte;
+    UartReadBlocking(std::span{&byte, 1});
+    return static_cast<uint8_t>(byte);
+}
+
+// send and poll the uart until transmitted
+void UartWriteCrash(std::span<const std::byte> data);
+inline void UartWriteCrash(std::string_view s) {
+    return UartWriteCrash(std::as_bytes(std::span{s.data(), s.size()}));
+}
+
+// block until room is available in tx fifo, then send
+void UartWriteBlocking(std::span<const std::byte> data);
+inline void UartWriteBlocking(std::string_view s) {
+    return UartWriteBlocking(std::as_bytes(std::span{s.data(), s.size()}));
+}
+
+void HandleUartTxFromIsr(void*, unsigned int transmitted);
+void HandleUartRxFromIsr(void*, unsigned int);
+void HandleUartIsr();
+
+uint8_t UartStatus();
+
+void LogStuff();

mbv/apps/async/uart_async.h

@@ -0,0 +1,15 @@
+#pragma once
+
+#include <span>
+#include <string_view>
+
+#include "lib/async.h"
+#include "lib/buffer.h"
+
+async::task<buffer> UartRead(int size);
+async::task<std::byte> UartReadLoop();
+async::task<> UartWrite(std::span<const std::byte> data);
+inline async::task<> UartWrite(std::string_view s) {
+    co_await UartWrite(std::as_bytes(std::span{s.data(), s.size()}));
+}
+async::task<> UartWriteLoop(async::gimme<std::span<const std::byte>>& data);

mbv/apps/helloworld/helloworld.cc

@@ -1,7 +1,7 @@
 #include <cstdint>
 
-#include "gpio.h"
+#include "hal/gpio.h"
-#include "pol0.h"
+#include "hal/pol0.h"
 
 namespace {
 
@@ -10,7 +10,7 @@ Gpio* gpio0;
 void sleep(int ms) {
     for (int m = 0; m < ms; m++) {
         for (int i = 0; i < 10000; i++) {
-            asm volatile ( "" );
+            asm volatile("");
         }
     }
 }

mbv/apps/timer/timer.cc

@@ -1,11 +1,12 @@
 #include <cstdint>
 
-#include "bios.h"
+#include "hal/bios.h"
-#include "gpio.h"
+#include "hal/gpio.h"
-#include "intc.h"
+#include "hal/intc.h"
-#include "interrupts.h"
+#include "hal/interrupts.h"
-#include "pol0.h"
+#include "hal/pol0.h"
-#include "timer.h"
+#include "hal/timer.h"
+
 
 namespace {
 
@@ -25,9 +26,8 @@ void SetupTimer() {
     timer->SetupAsWdt(100'000'000);
     timer->EnableT1();
 
-    SetIsr(TIMER0_IRQN, Timer0Isr);
+    intc::SetIsr(TIMER0_IRQN, Timer0Isr);
-    SetIrqEnabled(TIMER0_IRQN, true);
+    intc::SetIrqEnabled(TIMER0_IRQN, true);
-    EnableInterrupts();
 }
 
 }  // namespace
@@ -37,8 +37,10 @@ int main() {
     leds->data = 0xa0;
 
     SetupTimer();
-    SetExternalInterruptHandler(InterruptHandler);
+    intc::EnableInterrupts();
+    SetExternalInterruptHandler(intc::InterruptHandler);
     EnableExternalInterrupts();
+    EnableInterrupts(true);
 
     leds->data = 0xa1;
 

mbv/apps/uart/uart.cc

@@ -1,9 +1,9 @@
 #include <cstdint>
 
-#include "gpio.h"
+#include "hal/gpio.h"
-#include "intc.h"
+#include "hal/intc.h"
-#include "interrupts.h"
+#include "hal/interrupts.h"
-#include "pol0.h"
+#include "hal/pol0.h"
 #include "xuartlite.h"
 
 namespace {
@@ -23,16 +23,11 @@ XUartLite* uart0 = &uart0_inst;
 
 volatile int incoming = 0;
 
-void HandleUartRxFromIsr(void*, unsigned int) {
+void HandleUartRxFromIsr(void*, unsigned int) { incoming += 1; }
-    incoming += 1;
-}
 
-void HandleUartTxFromIsr(void*, unsigned int) {
+void HandleUartTxFromIsr(void*, unsigned int) {}
-}
 
-void Uart0Isr() {
+void Uart0Isr() { XUartLite_InterruptHandler(uart0); }
-    XUartLite_InterruptHandler(uart0);
-}
 
 void InitUarts() {
     XUartLite_CfgInitialize(uart0, &uart0_config, uart0_config.RegBaseAddr);
@@ -41,8 +36,8 @@ void InitUarts() {
     XUartLite_SetRecvHandler(uart0, HandleUartRxFromIsr, nullptr);
     XUartLite_EnableInterrupt(uart0);
 
-    SetIsr(UART0_IRQN, Uart0Isr);
+    intc::SetIsr(UART0_IRQN, Uart0Isr);
-    SetIrqEnabled(UART0_IRQN, true);
+    intc::SetIrqEnabled(UART0_IRQN, true);
 }
 
 }  // namespace
@@ -52,16 +47,18 @@ int main() {
     leds->data = 0xa0;
 
     InitUarts();
-    EnableInterrupts();
+    intc::EnableInterrupts();
-    SetExternalInterruptHandler(InterruptHandler);
+    SetExternalInterruptHandler(intc::InterruptHandler);
     EnableExternalInterrupts();
+    EnableInterrupts(true);
 
     int counter = 0;
 
     uint8_t c;
     while (XUartLite_Recv(uart0, &c, 1) > 0) {
         XUartLite_Send(uart0, &c, 1);
-        while (XUartLite_IsSending(uart0)) {}
+        while (XUartLite_IsSending(uart0)) {
+        }
     }
     leds->data = 0xa1;
     while (1) {
@@ -70,10 +67,12 @@ int main() {
             counter += 1;
             leds->data = counter;
             XUartLite_Send(uart0, &c, 1);
-            while (XUartLite_IsSending(uart0)) {}
+            while (XUartLite_IsSending(uart0)) {
+            }
             while (XUartLite_Recv(uart0, &c, 1) > 0) {
                 XUartLite_Send(uart0, &c, 1);
-                while (XUartLite_IsSending(uart0)) {}
+                while (XUartLite_IsSending(uart0)) {
+                }
             }
             incoming -= 1;
         }

mbv/bootloader/bootloader.cc

@@ -1,6 +1,6 @@
 #include <cstdint>
 
-#include "pol0.h"
+#include "hal/pol0.h"
 #include "xuartlite.h"
 
 uint8_t UartRead();
@@ -52,7 +52,8 @@ uint8_t UartRead() {
 
 void UartWrite(uint8_t c) {
     XUartLite_Send(uart0, &c, 1);
-    while (XUartLite_IsSending(uart0)) {}
+    while (XUartLite_IsSending(uart0)) {
+    }
 }
 
 int main() {

mbv/bootloader/wozmon.cc

@@ -88,8 +88,7 @@ int FindChar(const char* buf, uint8_t c) {
 
 }  // namespace
 
-__attribute__((used))
+__attribute__((used)) void wozmon() {
-void wozmon() {
     uint32_t cur_addr = 0;
     uint32_t cur_data = 0;
 

mbv/configure

@@ -25,9 +25,9 @@ class Config:
     hostlibs = "-lgtest -lgmock -lgtest_main"
     hostldflags = "-fprofile-instr-generate -fcoverage-mapping"
     include_dirs = [
-        "hal",
+        ".",
         "hal/uart",
-        "hal/lib/common",
+        "hal/xilinx",
     ]
     common_flags = [
         "-g",
@@ -43,6 +43,7 @@ class Config:
         "-g",
         "-Wl,--gc-sections",
         "-Wl,--print-memory-usage",
+        "-specs=nano.specs",
         "-flto",
         "-march=rv32i_zicsr",
     ]
@@ -268,10 +269,15 @@ hal = source_set("hal", [
         "hal/intc.cc",
         "hal/interrupts.cc",
         "hal/start.cc",
-        "hal/lib/common/xil_assert.c",
         "hal/uart/xuartlite.c",
-        "hal/uart/xuartlite_stats.c",
         "hal/uart/xuartlite_intr.c",
+        "hal/uart/xuartlite_stats.c",
+        "hal/xilinx/xil_assert.c",
+        ])
+
+lib = source_set("lib", [
+        "lib/async.cc",
+        "lib/lock.cc",
         ])
 
 bootloader = source_set("bootloader", glob.glob("./bootloader/**/*.cc", recursive=True))
@@ -282,22 +288,29 @@ bootloader_image = build_image(
     linker_script="bootloader/bootloader.ld",
 )
 
-def app_image(app):
+def app_image(app, sources=None):
+    if sources is None:
+        sources = glob.glob(f"./apps/{app}/**/*.cc", recursive=True)
     return build_image(
-            source_set(app, glob.glob(f"./apps/{app}/**/*.cc", recursive=True)),
+            source_set(app, sources),
             linker_script="apps/app.ld",
-            dependencies=[hal],
+            dependencies=[hal, lib],
             elf_out=f"{app}.elf",
             bin_out=f"{app}.bin",
     )
 
 all = [
         build_source_set(hal),
+        build_source_set(lib),
         bootloader_image,
 
         app_image("helloworld"),
         app_image("timer"),
         app_image("uart"),
+        app_image("async", sources=[
+            "apps/async/main.cc",
+            "apps/async/uart.cc",
+            ]),
 ]
 
 

mbv/hal/bios.h

@@ -8,5 +8,4 @@ uint8_t BiosUartRead();
 void BiosUartWrite(uint8_t);
 void BiosWozmon();
 void BiosUartWriteNibble(uint8_t);
-
 }

mbv/hal/debug.cc

@@ -7,20 +7,17 @@ void BiosUartWrite(uint8_t);
 void BiosWozmon();
 void BiosUartWriteNibble(uint8_t n);
 
-__attribute__((used))
+__attribute__((used)) void UartWriteU32(uint32_t a) {
-void UartWriteU32(uint32_t a) {
     for (int i = 0; i < 8; i++) {
         BiosUartWriteNibble(a >> 28);
         a <<= 4;
     }
 }
 
-__attribute__((used))
+__attribute__((used)) void UartWriteString(const char* s) {
-void UartWriteString(const char* s) {
     while (*s) {
         BiosUartWrite(*s);
         s++;
     }
 }
-
 }

mbv/hal/intc.cc

@@ -1,7 +1,9 @@
 #include "intc.h"
 
+// this interrupt controller is tied to the pol0 design
 #include "pol0.h"
 
+namespace intc {
 namespace {
 
 struct IntC {
@@ -22,7 +24,7 @@ struct IntC {
 IntC* intc = reinterpret_cast<IntC*>(INTC_BASE);
 Isr isrs[NIRQ] = {};
 
-}
+}  // namespace
 
 bool SetIrqEnabled(uint8_t irqn, bool enabled) {
     uint32_t mask = 1 << irqn;
@@ -37,13 +39,9 @@ bool SetIrqEnabled(uint8_t irqn, bool enabled) {
     return was_enabled;
 }
 
-void SetIsr(uint8_t irqn, Isr isr) {
+void SetIsr(uint8_t irqn, Isr isr) { isrs[irqn] = isr; }
-    isrs[irqn] = isr;
-}
 
-void EnableInterrupts() {
+void EnableInterrupts() { intc->MER = 0x3; }
-    intc->MER = 0x3;
-}
 
 void InterruptHandler() {
     uint32_t ipr = intc->IPR;
@@ -60,3 +58,5 @@ void InterruptHandler() {
         }
     }
 }
+
+}  // namespace intc

mbv/hal/intc.h

@@ -2,7 +2,9 @@
 
 #include <cstdint>
 
-using Isr = void(*)(void);
+namespace intc {
+
+using Isr = void (*)(void);
 
 /// Returns: true if the IRQ was previously enabled
 bool SetIrqEnabled(uint8_t irqn, bool enabled);
@@ -14,3 +16,5 @@ void EnableInterrupts();
 
 // Feed this to the CPU's interrupt handler
 void InterruptHandler();
+
+}  // namespace intc

mbv/hal/interrupts.cc

@@ -1,6 +1,8 @@
+#include "interrupts.h"
+
 #include <cstdint>
 
-#include "interrupts.h"
+#include "bios.h"
 
 namespace {
 
@@ -11,8 +13,7 @@ constexpr uint32_t kInterruptCauseMask = 0xff;
 
 Isr external_handler = nullptr;
 
-__attribute__((interrupt))
+__attribute__((interrupt)) void TrapHandler() {
-void TrapHandler() {
     uint32_t mcause;
     uint32_t mip;
     asm volatile("csrr %0, mcause" : "=r"(mcause));
@@ -25,28 +26,39 @@ void TrapHandler() {
         }
 
         mip &= ~(kMieExternalInterruptMask);
-        asm volatile("csrw mip, %0" :: "r"(mip));
+        asm volatile("csrw mip, %0" ::"r"(mip));
+    } else {
+        BiosWozmon();
     }
 }
 
-}
+}  // namespace
 
-void SetExternalInterruptHandler(Isr handler) {
+void SetExternalInterruptHandler(Isr handler) { external_handler = handler; }
-    external_handler = handler;
-}
 
 void EnableExternalInterrupts() {
-    uint32_t mstatus;
     uint32_t mie;
     Isr trap = TrapHandler;
 
-    asm volatile("csrr %0, mstatus" : "=r"(mstatus));
     asm volatile("csrr %0, mie" : "=r"(mie));
-
+    asm volatile("csrw mtvec, %0" ::"r"(trap));
-    asm volatile("csrw mtvec, %0" :: "r"(trap));
-
     mie |= kMieExternalInterruptMask;
-    asm volatile("csrw mie, %0" :: "r"(mie));
+    asm volatile("csrw mie, %0" ::"r"(mie));
-    mstatus |= kMstatusMieMask;
+}
-    asm volatile("csrw mstatus, %0" :: "r"(mstatus));
+
+bool EnableInterrupts(bool on) {
+    uint32_t mstatus;
+    bool was_on;
+    asm volatile("csrr %0, mstatus" : "=r"(mstatus));
+
+    was_on = (mstatus & kMstatusMieMask) > 0;
+
+    if (on) {
+        mstatus |= kMstatusMieMask;
+    } else {
+        mstatus &= ~kMstatusMieMask;
+    }
+
+    asm volatile("csrw mstatus, %0" ::"r"(mstatus));
+    return was_on;
 }

mbv/hal/interrupts.h

@@ -1,6 +1,9 @@
 #pragma once
 
-using Isr = void(*)();
+using Isr = void (*)();
 
 void SetExternalInterruptHandler(Isr handler);
 void EnableExternalInterrupts();
+
+/** Returns true if interrupts were enabled, false otherwise */
+bool EnableInterrupts(bool on);

mbv/hal/start.cc

@@ -2,15 +2,17 @@
 
 extern "C" uint32_t _bss_begin, _bss_end, _initial_stack_pointer;
 extern "C" int main();
+extern "C" void __libc_init_array();
 
-__attribute__((section(".start"), used, naked))
+__attribute__((section(".start"), used, naked)) void _start() {
-void _start() {
     // clear .bss
     for (uint32_t* ptr = &_bss_begin; ptr < &_bss_end; ptr++) {
         *ptr = 0;
     }
 
-    asm volatile ( "la sp, _initial_stack_pointer" );
+    asm volatile("la sp, _initial_stack_pointer");
+
+    __libc_init_array();
 
     main();
 

mbv/hal/timer.h

@@ -37,11 +37,15 @@ struct Timer {
 
     void EnableT1() {
         TCSR1.ARHT0 = 1;
+        TCSR1.ENIT0 = 1;  // enable interrupt for overflows
         TCSR1.ENT0 = 1;
     }
 
     uint32_t GetT1Ticks() { return TCR1; }
 
+    bool HasT1Overflowed() { return TCSR1.T0INT; }
+    void ClearT1Overflow() { TCSR1.T0INT = 1; }
+
     void SetupAsWdt(uint32_t timeout_ticks) {
         TLR0 = timeout_ticks;
         TCSR0.LOAD0 = 1;  // reset counter
@@ -59,9 +63,7 @@ struct Timer {
         TCSR0.ENT0 = 1;
     }
 
-    void ClearInterrupt() {
+    void ClearInterrupt() { TCSR0.T0INT = 0; }
-        TCSR0.T0INT = 0;
-    }
 
     static Timer* Instance(uint32_t base) {
         return reinterpret_cast<Timer*>(base);

mbv/hal/uart/Makefile

@@ -1,39 +0,0 @@
-DRIVER_LIB_VERSION = 1.0
-COMPILER=
-ARCHIVER=
-CP=cp
-COMPILER_FLAGS=
-EXTRA_COMPILER_FLAGS=
-LIB=libxil.a
-
-CC_FLAGS = $(COMPILER_FLAGS)
-ECC_FLAGS = $(EXTRA_COMPILER_FLAGS)
-
-RELEASEDIR=../../../lib/
-INCLUDEDIR=../../../include/
-INCLUDES=-I./. -I$(INCLUDEDIR)
-
-SRCFILES:=$(wildcard *.c)
-
-OBJECTS = $(addprefix $(RELEASEDIR), $(addsuffix .o, $(basename $(wildcard *.c))))
-
-libs: $(OBJECTS)
-
-DEPFILES := $(SRCFILES:%.c=$(RELEASEDIR)%.d)
-
-include $(wildcard $(DEPFILES))
-
-include $(wildcard ../../../../dep.mk)
-
-$(RELEASEDIR)%.o: %.c
-	${COMPILER} $(CC_FLAGS) $(ECC_FLAGS) $(INCLUDES) $(DEPENDENCY_FLAGS) $< -o $@
-
-.PHONY: include
-include: $(addprefix $(INCLUDEDIR),$(wildcard *.h))
-
-$(INCLUDEDIR)%.h: %.h
-	$(CP) $< $@
-
-clean:
-	rm -rf ${OBJECTS}
-	rm -rf $(DEPFILES)

mbv/hal/uart/xuartlite.c

@@ -387,8 +387,7 @@ int XUartLite_IsSending(XUartLite *InstancePtr)
 	/*
 	 * Read the status register to determine if the transmitter is empty
 	 */
-	StatusRegister = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
+	StatusRegister = XUartLite_GetSR(InstancePtr);
-						XUL_STATUS_REG_OFFSET);
 
 	/*
 	 * If the transmitter is not empty then indicate that the UART is still

mbv/hal/uart/xuartlite_intr.c

@@ -143,8 +143,7 @@ void XUartLite_InterruptHandler(XUartLite *InstancePtr)
 	 * Read the status register to determine which, coulb be both
 	 * interrupt is active
 	 */
-	IsrStatus = XUartLite_ReadReg(InstancePtr->RegBaseAddress,
+	IsrStatus = XUartLite_GetSR(InstancePtr);
-					XUL_STATUS_REG_OFFSET);
 
 	if ((IsrStatus & (XUL_SR_RX_FIFO_FULL |
 		XUL_SR_RX_FIFO_VALID_DATA)) != 0) {

mbv/lib/async.cc

@@ -0,0 +1,158 @@
+#include "async.h"
+
+#include <array>
+#include <atomic>
+#include <chrono>
+#include <utility>
+
+#include "lock.h"
+
+namespace async {
+namespace {
+
+using namespace std::literals::chrono_literals;
+
+struct Stuff {
+    std::coroutine_handle<> h;
+    std::chrono::system_clock::time_point expiration;
+
+    Stuff* next;
+};
+
+struct Notification {
+    bool pending;  // can only be true if stuff is nullptr
+    Stuff* stuff;
+};
+
+std::atomic<Stuff*> work = nullptr;
+std::array<Notification, static_cast<size_t>(AwaitableType::kNumTypes)>
+    notifications = {};
+
+}  // namespace
+
+void schedule(std::coroutine_handle<> h, int ms) {
+    InterruptLock lock;
+    std::chrono::system_clock::time_point exp =
+        std::chrono::system_clock::now() + std::chrono::milliseconds(ms);
+    Stuff* news = new Stuff{
+        .h = h,
+        .expiration = exp,
+    };
+
+    Stuff* stuff = work;
+
+    if (!stuff || stuff->expiration > exp) {
+        news->next = stuff;
+        work = news;
+        return;
+    }
+
+    Stuff* s = stuff;
+    while (s->next && s->next->expiration <= exp) {
+        s = s->next;
+    }
+
+    news->next = s->next;
+    s->next = news;
+}
+
+void step() {
+    Stuff* stuff;
+    // ensure all previous side effects are visible
+    {
+        InterruptLock lock;
+        stuff = work;
+    };
+
+    if (stuff == nullptr) {
+        return;
+    }
+
+    auto now = std::chrono::system_clock::now();
+    auto dt = stuff->expiration - now;
+
+    if (dt > 0ms) {
+        return;
+    }
+
+    int stuffinqueue = 0;
+    for (Stuff* s = stuff; s; s = s->next) stuffinqueue++;
+
+    stuff->h();
+
+    {
+        InterruptLock lock;
+        work = stuff->next;
+    }
+    delete stuff;
+}
+
+void reset() {
+    Stuff* stuff = work;
+    while (stuff) {
+        Stuff* byebye = stuff;
+        stuff = stuff->next;
+
+        delete byebye;
+    }
+    work = nullptr;
+}
+
+void main_loop(bool (*idle_function)()) {
+    while (1) {
+        if (idle_function != nullptr) {
+            if (idle_function()) {
+                reset();
+                break;
+            };
+        }
+
+        step();
+    }
+}
+
+void enqueue(std::coroutine_handle<> h, AwaitableType type) {
+    auto ttype = static_cast<size_t>(type);
+
+    {
+        InterruptLock lock;
+
+        const bool was_notified =
+            std::exchange(notifications[ttype].pending, false);
+        if (was_notified) {
+            schedule(h);
+            return;
+        }
+
+        Stuff* item = new Stuff{.h = h};
+        Stuff* stuff = notifications[ttype].stuff;
+        if (stuff == nullptr) {
+            notifications[ttype].stuff = item;
+            return;
+        }
+        while (stuff->next != nullptr) {
+            stuff = stuff->next;
+        }
+        stuff->next = item;
+    }
+}
+
+void resume(AwaitableType type) {
+    auto ttype = static_cast<size_t>(type);
+    Stuff* stuff = nullptr;
+    {
+        InterruptLock lock;
+
+        stuff = notifications[ttype].stuff;
+        if (stuff == nullptr) {
+            notifications[ttype].pending = true;
+            return;
+        }
+
+        notifications[ttype].stuff = stuff->next;
+        schedule(stuff->h);
+    }
+    delete stuff;
+}
+
+}  // namespace async

mbv/lib/async.h

@@ -0,0 +1,193 @@
+#pragma once
+
+#include <chrono>
+#include <coroutine>
+#include <utility>
+
+namespace async {
+
+struct continuation : std::suspend_always {
+    void await_suspend(std::coroutine_handle<>) noexcept {
+        if (parent) {
+            parent.resume();
+        }
+    }
+    std::coroutine_handle<> parent;
+};
+
+template <typename T = void>
+struct task;
+
+template <>
+struct task<void> {
+    struct promise_type;
+    using handle_type = std::coroutine_handle<promise_type>;
+
+    ~task() {
+        if (h) {
+            h.destroy();
+        }
+    }
+
+    struct promise_type {
+        task get_return_object() {
+            return {.h = handle_type::from_promise(*this)};
+        }
+        std::suspend_always initial_suspend() noexcept { return {}; }
+        continuation final_suspend() noexcept { return {.parent = parent}; }
+        void return_void() {}
+        void unhandled_exception() {}
+
+        std::coroutine_handle<> parent;
+    };
+
+    // awaitable
+    bool await_ready() {
+        h.promise().parent = {};
+        h.resume();
+        if (h.done()) {
+            return true;
+        }
+        return false;
+    }
+    void await_suspend(std::coroutine_handle<> ha) { h.promise().parent = ha; }
+    void await_resume() {}
+
+    handle_type h;
+};
+
+template <typename T>
+struct task {
+    struct promise_type;
+    using handle_type = std::coroutine_handle<promise_type>;
+
+    ~task() {
+        if (h) {
+            h.destroy();
+        }
+    }
+
+    struct promise_type {
+        task get_return_object() {
+            return {.h = handle_type::from_promise(*this)};
+        }
+        std::suspend_always initial_suspend() noexcept { return {}; }
+        continuation final_suspend() noexcept { return {.parent = parent}; }
+        void return_value(T&& value) { ret_value = std::move(value); }
+        void unhandled_exception() {}
+        template <std::convertible_to<T> From>
+        continuation yield_value(From&& value) {
+            ret_value = std::forward<From>(value);
+            result_ready = true;
+            return {.parent = parent};
+        }
+
+        T ret_value;
+        bool result_ready = false;
+        std::coroutine_handle<> parent;
+    };
+
+    // awaitable
+    bool await_ready() {
+        h.promise().parent = {};
+        h.resume();
+        if (h.promise().result_ready || h.done()) {
+            return true;
+        }
+        return false;
+    }
+    void await_suspend(std::coroutine_handle<> ha) { h.promise().parent = ha; }
+    T await_resume() {
+        h.promise().result_ready = false;
+        return std::move(h.promise().ret_value);
+    }
+
+    std::coroutine_handle<promise_type> h;
+};
+
+enum class AwaitableType {
+    kUnknown = 0,
+    kUartRx = 1,
+    kUartTx = 2,
+
+    kNumTypes
+};
+
+void schedule(std::coroutine_handle<> h, int ms = 0);
+void enqueue(std::coroutine_handle<> h, AwaitableType type);
+void resume(AwaitableType type);  // typically called from an ISR
+
+void main_loop(bool (*idle_function)());
+void step();
+
+inline auto await(AwaitableType type) {
+    struct awaitable {
+        AwaitableType type;
+
+        bool await_ready() { return false; };
+        void await_suspend(std::coroutine_handle<> h) { enqueue(h, type); }
+        void await_resume() {}
+    };
+
+    return awaitable{type};
+}
+
+inline auto delay(int ms) {
+    struct awaitable {
+        int ms;
+
+        bool await_ready() { return false; };
+        void await_suspend(std::coroutine_handle<> h) { schedule(h, ms); }
+        void await_resume() {}
+    };
+
+    return awaitable{ms};
+}
+
+template <typename T>
+struct gimme {
+    // child interface
+    bool await_ready() { return false; }
+    void await_suspend(std::coroutine_handle<> h) {
+        ha = h;
+        waiting = true;
+        if (parent) {
+            schedule(parent);
+        }
+    }
+    T await_resume() {
+        waiting = false;
+        return std::move(stuff);
+    }
+
+    // parent interface
+    auto feed(T&& s) {
+        struct awaitable {
+            bool await_ready() {
+                g.parent = {};
+                g.ha.resume();
+                return g.waiting;
+            }
+            void await_suspend(std::coroutine_handle<> h) { g.parent = h; }
+            void await_resume() {}
+
+            gimme<T>& g;
+        };
+
+        if (!waiting) {
+            __builtin_trap();
+        }
+        if (!ha) {
+            __builtin_trap();
+        }
+        stuff = std::move(s);
+        return awaitable{.g = *this};
+    }
+
+    bool waiting = false;
+    std::coroutine_handle<> ha;
+    std::coroutine_handle<> parent;
+    T stuff;
+};
+
+}  // namespace async

mbv/lib/buffer.h

@@ -0,0 +1,30 @@
+#pragma once
+
+#include <span>
+#include <utility>
+
+struct buffer {
+    std::span<std::byte> data;
+
+    buffer() = default;
+    buffer(std::span<std::byte> d) : data(d) {}
+
+    static buffer make(size_t size) {
+        return buffer({new std::byte[size], size});
+    }
+
+    buffer(buffer& other) = delete;
+    buffer& operator=(buffer& other) = delete;
+
+    buffer(buffer&& other) : data(std::exchange(other.data, {})) {}
+    buffer& operator=(buffer&& other) {
+        data = std::exchange(other.data, {});
+        return *this;
+    }
+
+    ~buffer() {
+        if (data.data()) {
+            delete[] data.data();
+        };
+    }
+};

mbv/lib/itoa.h

@@ -0,0 +1,13 @@
+#pragma once
+
+// out must be at least 8 bytes long
+inline void itoa(int val, char* out) {
+    for (int i = 0; i < 8; i++) {
+        uint8_t digit = (val >> (28 - 4 * i)) & 0xf;
+        if (digit < 0xa) {
+            out[i] = '0' + digit;
+        } else {
+            out[i] = 'a' + digit - 0xa;
+        }
+    }
+}

mbv/lib/lock.cc

@@ -0,0 +1,5 @@
+#include "lock.h"
+
+#ifdef __x86_64__
+std::recursive_mutex InterruptLock::m;
+#endif

mbv/lib/lock.h

@@ -0,0 +1,21 @@
+#pragma once
+
+#ifndef __x86_64__
+#include "hal/interrupts.h"
+
+struct InterruptLock {
+    bool was_on;
+
+    InterruptLock() : was_on(EnableInterrupts(false)) {}
+
+    ~InterruptLock() { EnableInterrupts(was_on); }
+};
+#else  // __x86_64__
+#include <mutex>
+
+struct InterruptLock {
+    static std::recursive_mutex m;
+    InterruptLock() { m.lock(); }
+    ~InterruptLock() { m.unlock(); }
+};
+#endif  // __x86_64__

mbv/lib/ring_buffer.h

@@ -0,0 +1,105 @@
+#pragma once
+
+#include <span>
+
+#include "lock.h"
+
+struct RingBuffer {
+    std::span<std::byte> buffer;
+
+    size_t read_ptr = 0;
+    size_t write_ptr = 0;
+    size_t used = 0;
+
+    bool Store(std::span<const std::byte> data) {
+        InterruptLock lock;
+
+        if (data.size() > FreeSpace()) {
+            return false;
+        }
+        const size_t to_copy = std::min(buffer.size() - write_ptr, data.size());
+        std::copy(data.begin(), data.begin() + to_copy,
+                  buffer.begin() + write_ptr);
+        if (to_copy < data.size()) {
+            std::copy(data.begin() + to_copy, data.end(), buffer.begin());
+        }
+        Push(data.size());
+
+        return true;
+    }
+
+    bool Load(std::span<std::byte> out) {
+        InterruptLock lock;
+
+        if (out.size() > AvailableData()) {
+            return false;
+        }
+        const size_t to_copy = std::min(buffer.size() - read_ptr, out.size());
+        std::copy(buffer.begin() + read_ptr,
+                  buffer.begin() + read_ptr + to_copy, out.begin());
+        if (to_copy < out.size()) {
+            std::copy(buffer.begin(), buffer.begin() + out.size() - to_copy,
+                      out.begin() + to_copy);
+        }
+        Pop(out.size());
+        return true;
+    }
+
+    bool Push(size_t amount) {
+        InterruptLock lock;
+
+        if (amount > FreeSpace()) {
+            return false;
+        }
+        write_ptr = (write_ptr + amount) % buffer.size();
+        used = used + amount;
+        return true;
+    }
+
+    bool Pop(size_t amount) {
+        InterruptLock lock;
+
+        if (amount > AvailableData()) {
+            return false;
+        }
+        read_ptr = (read_ptr + amount) % buffer.size();
+        used = used - amount;
+        return true;
+    }
+
+    size_t FreeSpace() const {
+        InterruptLock lock;
+
+        return buffer.size() - used;
+    }
+
+    size_t AvailableData() const {
+        InterruptLock lock;
+
+        return used;
+    }
+
+    uint8_t* RawReadPointer() const {
+        InterruptLock lock;
+
+        return reinterpret_cast<uint8_t*>(buffer.data() + read_ptr);
+    }
+
+    uint8_t* RawWritePointer() const {
+        InterruptLock lock;
+
+        return reinterpret_cast<uint8_t*>(buffer.data() + write_ptr);
+    }
+
+    size_t ContiguousFreeSpace() const {
+        InterruptLock lock;
+
+        return std::min(FreeSpace(), buffer.size() - write_ptr);
+    }
+
+    size_t ContiguousAvailableData() const {
+        InterruptLock lock;
+
+        return std::min(AvailableData(), buffer.size() - read_ptr);
+    }
+};

mbv/prog.py

@@ -6,32 +6,32 @@ import threading
 import time
 
 offset = 0x80000000
-tty = '/dev/ttyUSB1'
+tty = "/dev/ttyUSB1"
 baud = 115200
-chunksize = 128
+chunksize = 1024
 
 
 def write(s, offset, dat):
     for i in range(0, len(dat), chunksize):
-        chunk = dat[i: i + chunksize]
+        chunk = dat[i : i + chunksize]
-        cmd = struct.pack('<cII', b'c', offset + i, len(chunk))
+        cmd = struct.pack("<cII", b"c", offset + i, len(chunk))
 
-        print(f'Sending {len(chunk)} bytes @0x{offset + i:04x}')
+        print(f"Sending {len(chunk)} bytes @0x{offset + i:04x}")
 
         s.write(cmd)
         s.write(chunk)
 
         ack = s.read(2)
         if len(ack) < 2:
-            raise RuntimeError(f'timeout waiting for full ack. got {ack}')
+            raise RuntimeError(f"timeout waiting for full ack. got {ack}")
-        if ack[0] != b'a'[0]:
+        if ack[0] != b"a"[0]:
-            raise RuntimeError(f'expected ack, got this instead: {ack}')
+            raise RuntimeError(f"expected ack, got this instead: {ack}")
-        print(f'Ack! len={ack[1]}')
+        print(f"Ack! len={ack[1]}")
 
 
 def jump(s, offset):
-        cmd = struct.pack('<cI', b'j', offset)
+    cmd = struct.pack("<cI", b"j", offset)
-        print(f'Jumping to 0x{offset:04x}')
+    print(f"Jumping to 0x{offset:04x}")
     s.write(cmd)
 
 
@@ -40,21 +40,25 @@ def stream_logs(s):
         dat = s.read()
         if not dat:
             continue
-        sys.stdout.buffer.write(dat.replace(b'\r', b''))
+        sys.stdout.buffer.write(dat.replace(b"\r", b""))
         sys.stdout.buffer.flush()
 
 
 def parse_args():
     parser = argparse.ArgumentParser()
     parser.add_argument("binary")
-    parser.add_argument("--monitor", action="store_true",
+    parser.add_argument(
-                        help="wait for and display program serial output")
+        "--monitor",
+        action="store_true",
+        help="wait for and display program serial output",
+    )
     return parser.parse_args()
 
+
 def main():
     args = parse_args()
 
-    with open(args.binary, 'rb') as f:
+    with open(args.binary, "rb") as f:
         dat = f.read()
 
     s = serial.Serial(tty, baud, timeout=1)
@@ -67,7 +71,7 @@ def main():
 
         try:
             while True:
-                dat = input("") + '\r'
+                dat = input("") + "\r"
                 s.write(dat.encode())
         except KeyboardInterrupt:
             print("Bye.")

mbv/testecho.py

@@ -0,0 +1,62 @@
+import argparse
+import random
+import serial
+import sys
+import threading
+import time
+
+tty = "/dev/ttyUSB1"
+baud = 115200
+
+
+def sendrecv(s, size, timeout=5):
+    """Send some data and recv until the same data was received back."""
+    data = random.randbytes(size)
+    return sendcheck(s, data, timeout)
+
+
+def sendcheck(s, data, timeout=5):
+    s.write(data)
+    received = 0
+    start = time.time()
+    got = bytearray()
+    while received < len(data):
+        r = s.read()
+        got += r
+        try:
+            assert(r == data[received: received + len(r)])
+            assert(time.time() < start + timeout)
+        except:
+            fr = received - 10
+            to = received + len(r) + 1
+            sdat = data[fr: to]
+            rdat = bytes(got[fr: to])
+            print(f"failed after receiving {received} correct bytes")
+            print(f"expected {sdat}")
+            print(f"     got {rdat}")
+            sys.exit(-1)
+
+        received += len(r)
+
+
+def parse_args():
+    parser = argparse.ArgumentParser()
+    return parser.parse_args()
+
+
+def main():
+    args = parse_args()
+
+    s = serial.Serial(tty, baud, timeout=1)
+    for i in range(12):
+        size = 2**i
+        print(f"Trying with {size} bytes")
+        sendrecv(s, size)
+        data = b'ze%s\x96:M#\xd8\x98\x9d\x96\xf5?\x80c\xc6\xa7\x03\xe0i\x04V\xcb\xa3\x95#GC\xabf\x98'
+        #sendcheck(s, data)
+
+    print("All sizes passed.")
+
+
+if __name__ == "__main__":
+    main()

tools/cc.py

@@ -1490,7 +1490,7 @@ def parse_tree(tree, debug=False):
 
 def larkparse(f, debug=False):
     with open(GRAMMAR_FILE) as g:
-        asparser = lark.Lark(g.read())
+        asparser = lark.Lark(g.read(), maybe_placeholders=False)
     data = f.read()
     if isinstance(data, bytes):
         data = data.decode()

tools/ld.py

@@ -69,7 +69,7 @@ def dump(secmap):
 
 
 def parse_args():
-    parser = argparse.ArgumentParser(description='Assemble.')
+    parser = argparse.ArgumentParser(description='Link.')
     parser.add_argument('--debug', action='store_true',
                         help='print debug info')
     parser.add_argument('objfiles', metavar='O', nargs='+',

wave/Makefile

@@ -0,0 +1,17 @@
+all: sim
+sim: pdmout_test.ghw square_test.ghw wave_test.ghw
+
+sim_sources = pdmout_test.vhdl square_test.vhdl wave_test.vhdl
+sources = pdmout.vhdl square.vhdl wave.vhdl pdm.vhdl
+
+
+%.ghw: work-obj93.cf
+	ghdl -r $* --wave=$@
+
+
+work-obj93.cf: $(sim_sources) $(sources)
+	ghdl -a $^
+
+PHONY: sim
+
+.PRECIOUS: test.ghw

wave/makefile

@@ -1,17 +0,0 @@
-all: sim
-sim: pdmout_test.ghw square_test.ghw
-
-sim_sources = pdmout_test.vhdl square_test.vhdl
-sources = pdmout.vhdl square.vhdl
-
-
-%.ghw: work-obj93.cf
-	ghdl -r $* --wave=$@
-
-
-work-obj93.cf: $(sim_sources) $(sources)
-	ghdl -a $^
-
-PHONY: sim
-
-.PRECIOUS: test.ghw

wave/pdm.vhdl

@@ -0,0 +1,46 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity pdm is
+  port
+  (
+    clk     : in std_logic;
+    rst     : in std_logic;
+
+    -- hardware
+    out_pin  : out std_logic;
+
+    -- input interface
+    enabled : in std_logic;
+    sample  : in std_logic_vector(15 downto 0)
+  );
+end pdm;
+
+architecture Behavioral of pdm is
+
+  signal feedback: signed(16 downto 0);
+
+begin
+
+  -- PDM process
+  -- drives pin_out, feedback
+  process(clk, rst)
+  begin
+
+    if rst = '1' then
+      feedback <= to_signed(0, 17);
+      out_pin <= '0';
+    elsif rising_edge(clk) and enabled = '1' then
+      if feedback > 0 then
+        out_pin <= '1';
+        feedback <= feedback + signed("0" & sample) - ("0" & x"ffff");
+      else
+        out_pin <= '0';
+        feedback <= feedback + signed("0" & sample);
+      end if;
+    end if;
+
+  end process;
+
+end Behavioral;

wave/wave.vhdl

@@ -0,0 +1,175 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+-- some kind of square wave generator, with PDM output
+entity wave is
+  port
+    (
+    -- AXI4 slave interface
+    aclk    : in std_logic;
+    aresetn : in std_logic;
+
+    -- read addr
+    araddr  : in std_logic_vector(31 downto 0);
+    arvalid : in std_logic;
+    arready : out std_logic;
+
+    -- read data
+    rdata   : out std_logic_vector(31 downto 0);
+    rresp   : out std_logic;
+    rvalid  : out std_logic;
+    rready  : in std_logic;
+
+    -- write addr
+    awaddr  : in std_logic_vector(31 downto 0);
+    awvalid : in std_logic;
+    awready : out std_logic;
+
+    -- write data
+    wdata   : in std_logic_vector(31 downto 0);
+    wstrb   : in std_logic_vector(3 downto 0);
+
+    -- write resp
+    bresp   : out std_logic;
+    bvalid  : out std_logic;
+    bready  : in std_logic;
+
+
+    -- PDM output!
+    pdmout  : out std_logic
+  );
+end wave;
+
+--
+-- Mem layout:
+--  0x00: control: [bit0: enabled]
+--  0x04: 32-bit unsigned period (in clock cycles)
+--  0x08: 16-bit unsigned high value (high 16 bits ignored)
+--  0x0c: 16-bit unsigned low value (high 16 bits ignored)
+
+architecture Behavioral of wave is
+
+  component pdm is
+    port
+      (
+      clk     : in std_logic;
+      rst     : in std_logic;
+
+      -- hardware
+      out_pin  : out std_logic;
+
+      -- input interface
+      enabled : in std_logic;
+      sample  : in std_logic_vector(15 downto 0)
+    );
+  end component;
+
+  -- all registers
+  signal period, hi_val, lo_val, sample: std_logic_vector(15 downto 0);
+  signal enabled, rst, onwrite: std_logic;
+  signal counter: unsigned(23 downto 0);
+
+begin
+
+  arready <= '1';
+  awready <= '1';
+  rst <= not aresetn;
+
+  pdm0: pdm port map(clk => aclk, rst => rst, out_pin => pdmout,
+      sample => sample, enabled => enabled);
+
+    -- main process
+    -- drives counter, sample
+  process(aclk, aresetn)
+    variable high: std_logic;
+  begin
+
+    if aresetn = '0' then
+      counter <= to_unsigned(0, 24);
+      sample <= x"0000";
+      high := '0';
+    elsif rising_edge(aclk) then
+      counter <= to_unsigned(0, 24);
+      if high = '1' then
+        sample <= hi_val;
+      else
+        sample <= lo_val;
+      end if;
+
+      if enabled = '1' and unsigned(period) /= 0 and onwrite = '0' then
+        if counter(22 downto 7) = unsigned(period) - 1
+          and counter(6 downto 0) = x"7f" then
+          high := not high;
+        else
+          counter <= counter + 1;
+        end if;
+      end if;
+    end if;
+
+  end process;
+
+  -- Bus slave process
+  -- drives period, value, out_addr, enabled, onwrite
+  process(aclk, aresetn)
+    -- 00: control, 01: period, 02: high, 03: low
+    variable waddr: std_logic_vector(2 downto 0);
+    variable raddr: std_logic_vector(2 downto 0);
+  begin
+
+    if aresetn = '0' then
+      period <= x"0000";
+      hi_val <= x"0000";
+      lo_val <= x"0000";
+      enabled <= '0';
+      waddr := "000";
+
+    elsif rising_edge(aclk) then
+
+      rvalid <= '0';
+      rdata <= x"00000000";
+      rresp <= '0';
+      bvalid <= '0';
+      bresp <= '0';
+      onwrite <= '0';
+
+      if arvalid = '1' then
+        raddr := araddr(4 downto 2);
+      end if;
+      if awvalid = '1' then
+        waddr := awaddr(4 downto 2);
+      end if;
+      if arvalid = '1' then
+        case waddr(1 downto 0) is
+          when "00" =>
+            rdata(0) <= enabled;
+          when "01" =>
+            rdata(23 downto 8) <= period;
+          when "10" =>
+            rdata(15 downto 0) <= hi_val;
+          when "11" =>
+            rdata(15 downto 0) <= lo_val;
+          when others =>
+        end case;
+        rvalid <= '1';
+      end if;
+      if unsigned(wstrb) > 0 then
+        case waddr(1 downto 0) is
+          when "00" =>
+            enabled <= wdata(0);
+          when "01" =>
+            period <= wdata(23 downto 8);
+          when "10" =>
+            hi_val <= wdata(15 downto 0);
+          when "11" =>
+            lo_val <= wdata(15 downto 0);
+          when others =>
+        end case;
+        bvalid <= '1';
+        onwrite <= '1';
+      end if;
+    end if;
+
+  end process;
+
+end Behavioral;

wave/wave_test.vhdl

@@ -0,0 +1,165 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+use std.textio.all;
+
+entity wave_test is
+end wave_test;
+
+architecture rtl of wave_test is
+
+  component wave is
+    port
+    (
+      -- AXI4 slave interface
+      aclk    : in std_logic;
+      aresetn : in std_logic;
+
+      -- read addr
+      araddr  : in std_logic_vector(31 downto 0);
+      arvalid : in std_logic;
+      arready : out std_logic;
+
+      -- read data
+      rdata   : out std_logic_vector(31 downto 0);
+      rresp   : out std_logic;
+      rvalid  : out std_logic;
+      rready  : in std_logic;
+
+      -- write addr
+      awaddr  : in std_logic_vector(31 downto 0);
+      awvalid : in std_logic;
+      awready : out std_logic;
+
+      -- write data
+      wdata   : in std_logic_vector(31 downto 0);
+      wstrb   : in std_logic_vector(3 downto 0);
+
+      -- write resp
+      bresp   : out std_logic;
+      bvalid  : out std_logic;
+      bready  : in std_logic;
+
+
+      -- PDM output!
+      pdmout  : out std_logic
+    );
+  end component;
+
+  signal finished, clk, rst, rstn: std_logic := '0';
+
+  signal arvalid, arready, awvalid, awready: std_logic;
+  signal rresp, rvalid, rready, bresp, bvalid, bready: std_logic;
+  signal wstrb: std_logic_vector(3 downto 0);
+  signal araddr, rdata, awaddr, wdata: std_logic_vector(31 downto 0);
+
+  signal pdmout: std_logic;
+
+  constant period: integer := 7 * 256;
+  constant half_time: time := 1280 ns * period;
+
+begin
+  rstn <= not rst;
+  dut: wave port map(aclk => clk, aresetn => rstn,
+  arvalid => arvalid, arready => arready, awvalid => awvalid, awready => awready,
+  rresp => rresp, rvalid => rvalid, rready => rready, bresp => bresp, bvalid => bvalid, bready => bready,
+  wstrb => wstrb, araddr => araddr, rdata => rdata, awaddr => awaddr, wdata => wdata,
+  pdmout => pdmout
+                    );
+
+  -- tick tock
+  process
+  begin
+    if finished = '0' then
+      clk <= not clk;
+      wait for 5 ns;
+    else
+      clk <= '0';
+      wait;
+    end if;
+  end process;
+
+  process
+  begin
+    rst <= '1';
+
+    arvalid <= '0';
+    awvalid <= '0';
+    wstrb <= "0000";
+
+    wait for 1 ns;
+--    assert(='0') report "Fail rst" severity error;
+
+    rst <= '0';
+
+    wait for 10 ns;
+
+    awvalid <= '1';
+    awaddr <= x"00000000";  -- enable
+    wstrb <= "1111";
+    wdata <= x"00000001";
+    bready <= '1';
+
+    wait for 10 ns;
+    assert(bvalid = '1') report "Write error" severity error;
+    assert(bresp = '0') report "Write fail" severity error;
+    assert(awready = '1') report "Write error" severity error;
+
+    awaddr <= x"00000004";  -- period
+    wdata <= std_logic_vector(to_unsigned(period, 32));
+
+    wait for 10 ns;
+
+    -- read back
+    wstrb <= "0000";
+    awvalid <= '0';
+    arvalid <= '1';
+    araddr <= x"00000004";
+    rready <= '1';
+
+    wait for 10 ns;
+    assert(unsigned(rdata) = period) report "Period readback failed" severity error;
+
+    arvalid <= '0';
+    awvalid <= '1';
+    wstrb <= "1111";
+
+    awaddr <= x"00000008"; -- high
+    wdata <= x"00008000";
+
+    wait for 10 ns;
+
+    awaddr <= x"0000000c"; -- low
+    wdata <= x"00004000";
+
+    wait for 10 ns;
+
+    wstrb <= "0000";
+    awvalid <= '0';
+
+    wait for 30 ns;
+    assert(pdmout = '1') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '0') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '0') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '1') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '0') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '0') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '0') report "wrong pdmout" severity error;
+    wait for 10 ns;
+    assert(pdmout = '1') report "wrong pdmout" severity error;
+
+    wait for 100 us;
+
+    assert false report "Test done." severity note;
+
+    finished <= '1';
+    wait;
+
+  end process;
+end rtl;