diff --git a/.gitignore b/.gitignore index c8d76e0..510df94 100644 --- a/.gitignore +++ b/.gitignore @@ -5,4 +5,5 @@ tools/obj_pb2.py work-obj93.cf *.ghw *.gen.vhdl +*.bin .*.swp diff --git a/dsp/bootloader.c b/dsp/bootloader.c new file mode 100644 index 0000000..8dc1a02 --- /dev/null +++ b/dsp/bootloader.c @@ -0,0 +1,40 @@ +#include "sys.h" + +int main() { + uint16_t addr; + uint8_t len; + uint16_t val; + + led0->output = 1; + + while(1) { + uint8_t c = uart_read(uart0); + if (c == 'c') { + c = uart_read(uart0); + addr = c << 8; + c = uart_read(uart0); + addr |= c; + + len = uart_read(uart0); + for (int i = 0; i < len; i += 2) { + c = uart_read(uart0); + val = c << 8; + c = uart_read(uart0); + val |= c; + + *((uint16_t*)(addr + i)) = val; + } + + uart_write(uart0, 'a'); + uart_write(uart0, len); + led0->output = 0xf0; + } else if (c == 'j') { + c = uart_read(uart0); + addr = c << 8; + c = uart_read(uart0); + addr |= c; + + ((void (*)())addr)(); + } + } +} diff --git a/dsp/hello.c b/dsp/hello.c new file mode 100644 index 0000000..b382731 --- /dev/null +++ b/dsp/hello.c @@ -0,0 +1,35 @@ +#include "sys.h" + +#define CYCLES_PER_MS 6666 // ish + +void busy_sleep_1ms() { + for (int i = 0; i < CYCLES_PER_MS; ++i) { + // nothing + } +} + +/** waits a general amount of time */ +void busy_sleep(int ms) { + for (int i = 0; i < ms; ++i) { + busy_sleep_1ms(); + } +} + +int strlen(const char* str) { + int i = 0; + while(str[i] != '\0') { + i++; + } + return i; +} + +void log(const char* stuff) { + uart_writen(uart0, stuff, strlen(stuff)); +} + +int main() { + while(1) { + log("Hello, world!\r\n"); + busy_sleep(1000); + } +} diff --git a/dsp/makefile b/dsp/makefile index 2261c0c..c326be7 100644 --- a/dsp/makefile +++ b/dsp/makefile @@ -8,7 +8,13 @@ LD = ../bin/ld CFLAGS = -I../wave -I../uart -boot_rom.gen.vhdl: main.o ../uart/uart.o +offset = $(shell printf "%d" 0x1100) + +boot_rom.gen.vhdl: bootloader.o ../uart/uart.o + +hello.bin: hello.o ../uart/uart.o + +synth.bin: main.o ../uart/uart.o sim_sources = dsp_test.vhdl sources = boot_rom.gen.vhdl dsp.vhdl ram.vhdl \ @@ -24,6 +30,9 @@ sources = boot_rom.gen.vhdl dsp.vhdl ram.vhdl \ ../lab/dsp/au_base_project.runs/synth_1/runme.sh +%.bin: + $(LD) -o $@ --offset $(offset) $^ + %.gen.vhdl: $(LD) -o $@ --vhdl $*.vhdl.in $^ @@ -38,7 +47,7 @@ work-obj93.cf: $(sim_sources) $(sources) PHONY: bin sim rom clean clean: - rm -rf *.o *.gen.vhdl *.ghw work-obj93.cf + rm -rf *.o *.gen.vhdl *.ghw work-obj93.cf *.bin .DELETE_ON_ERROR: diff --git a/dsp/prog.py b/dsp/prog.py new file mode 100644 index 0000000..02be094 --- /dev/null +++ b/dsp/prog.py @@ -0,0 +1,46 @@ +import serial +import struct +import sys + +offset = 0x1100 +tty = 'tty' +baud = 1000000 + + +def write(s, offset, dat): + for i in range(0, len(dat), 128): + chunk = dat[i: i + 128] + cmd = struct.pack('>cHB', b'c', offset + i, len(chunk)) + + print(f'Sending {len(chunk)} bytes @0x{offset + i:04x}') + + s.write(cmd) + s.write(chunk) + + ack = s.read(2) + if len(ack) < 2: + raise RuntimeError(f'timeout waiting for full ack. got {ack}') + if ack[0] != b'a'[0]: + raise RuntimeError(f'expected ack, got this instead: {ack}') + print(f'Ack! len={ack[1]}') + + +def jump(s, offset): + addr = struct.pack('>H', offset) + + s.write(b'j') + s.write(addr) + + +def main(): + binfile = sys.argv[1] + with open(binfile, 'rb') as f: + dat = f.read() + + s = serial.Serial(tty, baud, timeout=1) + write(s, offset, dat) + jump(s, offset) + + +if __name__ == "__main__": + main()