From 963cd1059efac60372fcbe510c605ef067a020b5 Mon Sep 17 00:00:00 2001 From: Paul Mathieu Date: Sat, 13 Mar 2021 15:46:20 -0800 Subject: [PATCH] square: stay quiet if period = 0 --- wave/square.vhdl | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/wave/square.vhdl b/wave/square.vhdl index 0e5c75d..836be68 100644 --- a/wave/square.vhdl +++ b/wave/square.vhdl @@ -38,21 +38,28 @@ architecture Behavioral of square is signal enabled: std_logic; signal counter: unsigned(23 downto 0); + signal active: std_logic; begin -- counter process - -- drives counter + -- drives counter, active process(clk, rst) begin if rst = '1' then counter <= to_unsigned(0, 24); + active <= '0'; elsif rising_edge(clk) then - if enabled = '0' or counter(22 downto 7) = unsigned(period) then - counter <= to_unsigned(0, 24); - else - counter <= counter + 1; + active <= '0'; + counter <= to_unsigned(0, 24); + + if enabled = '1' and unsigned(period) /= 0 then + if counter(22 downto 7) = unsigned(period) then + active <= '1'; + else + counter <= counter + 1; + end if; end if; end if; @@ -76,9 +83,9 @@ begin m_we <= '0'; if enabled = '1' then - if counter = 0 and m_busy = '1' then + if active = '1' and m_busy = '1' then deferred := '1'; - elsif deferred = '1' or (counter = 0 and m_busy = '0') then + elsif deferred = '1' or (active = '1' and m_busy = '0') then m_we <= '1'; m_addr <= out_addr; if high = '1' then