cc: add shr
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parent
edb4161724
commit
8dfa5addfd
12
tools/cc.py
12
tools/cc.py
@ -469,6 +469,7 @@ MulOp = make_cpu_bin_op('mul')
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AndOp = make_cpu_bin_op('and')
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AndOp = make_cpu_bin_op('and')
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OrOp = make_cpu_bin_op('or')
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OrOp = make_cpu_bin_op('or')
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XorOp = make_cpu_bin_op('xor')
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XorOp = make_cpu_bin_op('xor')
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ShrOp = make_cpu_bin_op('shr') # 2nd operand needs to be a literal
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class ShlOp(BinOp):
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class ShlOp(BinOp):
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scratch_need = 2
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scratch_need = 2
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@ -1270,6 +1271,17 @@ class CcInterp(lark.visitors.Interpreter):
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neq = _binary_op(NeqOp)
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neq = _binary_op(NeqOp)
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eq = _combo(bool_not, 'neq')
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eq = _combo(bool_not, 'neq')
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def shr(self, tree):
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self.visit(tree.children[0])
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left = tree.children[0].op.out
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assert tree.children[1].data == 'literal'
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right = tree.children[1].children[0]
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dest = self.cur_fun.regs.take()
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tree.op = ShrOp(self.cur_fun, [dest, left, right])
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self._synth(tree.op)
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self.cur_fun.regs.give(left)
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tree.type = tree.children[0].type # because uhm reasons
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def _assign(self, left, right):
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def _assign(self, left, right):
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self._log(f'assigning {left} = {right}')
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self._log(f'assigning {left} = {right}')
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self.cur_fun.regs.assign(left, right)
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self.cur_fun.regs.assign(left, right)
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