mbv: clang-format

This commit is contained in:
Paul Mathieu 2025-06-25 08:38:46 -07:00
parent 0c7206f186
commit 7f1f924331
13 changed files with 38 additions and 52 deletions

View File

@ -10,7 +10,7 @@ Gpio* gpio0;
void sleep(int ms) {
for (int m = 0; m < ms; m++) {
for (int i = 0; i < 10000; i++) {
asm volatile ( "" );
asm volatile("");
}
}
}

View File

@ -1,3 +1,5 @@
#include "timer.h"
#include <cstdint>
#include "bios.h"
@ -5,7 +7,6 @@
#include "intc.h"
#include "interrupts.h"
#include "pol0.h"
#include "timer.h"
namespace {

View File

@ -23,16 +23,11 @@ XUartLite* uart0 = &uart0_inst;
volatile int incoming = 0;
void HandleUartRxFromIsr(void*, unsigned int) {
incoming += 1;
}
void HandleUartRxFromIsr(void*, unsigned int) { incoming += 1; }
void HandleUartTxFromIsr(void*, unsigned int) {
}
void HandleUartTxFromIsr(void*, unsigned int) {}
void Uart0Isr() {
XUartLite_InterruptHandler(uart0);
}
void Uart0Isr() { XUartLite_InterruptHandler(uart0); }
void InitUarts() {
XUartLite_CfgInitialize(uart0, &uart0_config, uart0_config.RegBaseAddr);
@ -62,7 +57,8 @@ int main() {
uint8_t c;
while (XUartLite_Recv(uart0, &c, 1) > 0) {
XUartLite_Send(uart0, &c, 1);
while (XUartLite_IsSending(uart0)) {}
while (XUartLite_IsSending(uart0)) {
}
}
leds->data = 0xa1;
while (1) {
@ -71,10 +67,12 @@ int main() {
counter += 1;
leds->data = counter;
XUartLite_Send(uart0, &c, 1);
while (XUartLite_IsSending(uart0)) {}
while (XUartLite_IsSending(uart0)) {
}
while (XUartLite_Recv(uart0, &c, 1) > 0) {
XUartLite_Send(uart0, &c, 1);
while (XUartLite_IsSending(uart0)) {}
while (XUartLite_IsSending(uart0)) {
}
}
incoming -= 1;
}

View File

@ -52,7 +52,8 @@ uint8_t UartRead() {
void UartWrite(uint8_t c) {
XUartLite_Send(uart0, &c, 1);
while (XUartLite_IsSending(uart0)) {}
while (XUartLite_IsSending(uart0)) {
}
}
int main() {

View File

@ -59,10 +59,10 @@ void UartWriteUint8(uint8_t a) {
}
void UartDump(uint32_t addr, int count) {
for (int i = 0; i < count; i++) {
UartWrite(' ');
UartWriteUint8(*reinterpret_cast<uint8_t*>(addr + i));
}
for (int i = 0; i < count; i++) {
UartWrite(' ');
UartWriteUint8(*reinterpret_cast<uint8_t*>(addr + i));
}
}
void DumpHex(uint32_t addr) {
@ -88,8 +88,7 @@ int FindChar(const char* buf, uint8_t c) {
} // namespace
__attribute__((used))
void wozmon() {
__attribute__((used)) void wozmon() {
uint32_t cur_addr = 0;
uint32_t cur_data = 0;
@ -98,7 +97,7 @@ void wozmon() {
while (1) {
uint8_t c = UartRead();
UartWrite(c); // echo
UartWrite(c); // echo
if (c == '\r') {
*inptr = 0;
if (inptr == inbuf) {

View File

@ -8,5 +8,4 @@ uint8_t BiosUartRead();
void BiosUartWrite(uint8_t);
void BiosWozmon();
void BiosUartWriteNibble(uint8_t);
}

View File

@ -7,20 +7,17 @@ void BiosUartWrite(uint8_t);
void BiosWozmon();
void BiosUartWriteNibble(uint8_t n);
__attribute__((used))
void UartWriteU32(uint32_t a) {
__attribute__((used)) void UartWriteU32(uint32_t a) {
for (int i = 0; i < 8; i++) {
BiosUartWriteNibble(a >> 28);
a <<= 4;
}
}
__attribute__((used))
void UartWriteString(const char* s) {
__attribute__((used)) void UartWriteString(const char* s) {
while (*s) {
BiosUartWrite(*s);
s++;
}
}
}

View File

@ -39,13 +39,9 @@ bool SetIrqEnabled(uint8_t irqn, bool enabled) {
return was_enabled;
}
void SetIsr(uint8_t irqn, Isr isr) {
isrs[irqn] = isr;
}
void SetIsr(uint8_t irqn, Isr isr) { isrs[irqn] = isr; }
void EnableInterrupts() {
intc->MER = 0x3;
}
void EnableInterrupts() { intc->MER = 0x3; }
void InterruptHandler() {
uint32_t ipr = intc->IPR;

View File

@ -4,7 +4,7 @@
namespace intc {
using Isr = void(*)(void);
using Isr = void (*)(void);
/// Returns: true if the IRQ was previously enabled
bool SetIrqEnabled(uint8_t irqn, bool enabled);

View File

@ -1,7 +1,8 @@
#include "interrupts.h"
#include <cstdint>
#include "bios.h"
#include "interrupts.h"
namespace {
@ -12,8 +13,7 @@ constexpr uint32_t kInterruptCauseMask = 0xff;
Isr external_handler = nullptr;
__attribute__((interrupt))
void TrapHandler() {
__attribute__((interrupt)) void TrapHandler() {
uint32_t mcause;
uint32_t mip;
asm volatile("csrr %0, mcause" : "=r"(mcause));
@ -26,7 +26,7 @@ void TrapHandler() {
}
mip &= ~(kMieExternalInterruptMask);
asm volatile("csrw mip, %0" :: "r"(mip));
asm volatile("csrw mip, %0" ::"r"(mip));
} else {
BiosWozmon();
}
@ -34,18 +34,16 @@ void TrapHandler() {
} // namespace
void SetExternalInterruptHandler(Isr handler) {
external_handler = handler;
}
void SetExternalInterruptHandler(Isr handler) { external_handler = handler; }
void EnableExternalInterrupts() {
uint32_t mie;
Isr trap = TrapHandler;
asm volatile("csrr %0, mie" : "=r"(mie));
asm volatile("csrw mtvec, %0" :: "r"(trap));
asm volatile("csrw mtvec, %0" ::"r"(trap));
mie |= kMieExternalInterruptMask;
asm volatile("csrw mie, %0" :: "r"(mie));
asm volatile("csrw mie, %0" ::"r"(mie));
}
bool EnableInterrupts(bool on) {
@ -61,6 +59,6 @@ bool EnableInterrupts(bool on) {
mstatus &= ~kMstatusMieMask;
}
asm volatile("csrw mstatus, %0" :: "r"(mstatus));
asm volatile("csrw mstatus, %0" ::"r"(mstatus));
return was_on;
}

View File

@ -1,6 +1,6 @@
#pragma once
using Isr = void(*)();
using Isr = void (*)();
void SetExternalInterruptHandler(Isr handler);
void EnableExternalInterrupts();

View File

@ -3,14 +3,13 @@
extern "C" uint32_t _bss_begin, _bss_end, _initial_stack_pointer;
extern "C" int main();
__attribute__((section(".start"), used, naked))
void _start() {
__attribute__((section(".start"), used, naked)) void _start() {
// clear .bss
for (uint32_t* ptr = &_bss_begin; ptr < &_bss_end; ptr++) {
*ptr = 0;
}
asm volatile ( "la sp, _initial_stack_pointer" );
asm volatile("la sp, _initial_stack_pointer");
main();

View File

@ -59,9 +59,7 @@ struct Timer {
TCSR0.ENT0 = 1;
}
void ClearInterrupt() {
TCSR0.T0INT = 0;
}
void ClearInterrupt() { TCSR0.T0INT = 0; }
static Timer* Instance(uint32_t base) {
return reinterpret_cast<Timer*>(base);