arm: add uart echo app
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350
arm/hal/lib/common/xenv_standalone.h
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350
arm/hal/lib/common/xenv_standalone.h
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/******************************************************************************
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* Copyright (c) 2002 - 2021 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xenv_standalone.h
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*
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* Defines common services specified by xenv.h.
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*
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* @note
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* This file is not intended to be included directly by driver code.
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* Instead, the generic xenv.h file is intended to be included by driver
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* code.
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*
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -----------------------------------------------
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* 1.00a wgr 02/28/07 Added cache handling macros.
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* 1.00a wgr 02/27/07 Simplified code. Deprecated old-style macro names.
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* 1.00a rmm 01/24/06 Implemented XENV_USLEEP. Assume implementation is being
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* used under Xilinx standalone BSP.
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* 1.00a xd 11/03/04 Improved support for doxygen.
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* 1.00a rmm 03/21/02 First release
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* 1.00a wgr 03/22/07 Converted to new coding style.
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* 1.00a rpm 06/29/07 Added udelay macro for standalone
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* 1.00a xd 07/19/07 Included xparameters.h as XPAR_ constants are referred
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* to in MICROBLAZE section
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* 1.00a ecm 09/19/08 updated for v7.20 of Microblaze, new functionality
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*
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* </pre>
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*
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*
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******************************************************************************/
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/**
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*@cond nocomments
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*/
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#ifndef XENV_STANDALONE_H
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#define XENV_STANDALONE_H
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#include "xil_types.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/***************************** Include Files *********************************/
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/******************************************************************************
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*
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* Get the processor dependent includes
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*
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******************************************************************************/
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#include <string.h>
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#if defined __MICROBLAZE__
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# include "mb_interface.h"
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# include "xparameters.h" /* XPAR constants used below in MB section */
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#elif defined __PPC__
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# include "sleep.h"
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# include "xcache_l.h" /* also include xcache_l.h for caching macros */
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#endif
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/******************************************************************************
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*
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* MEMCPY / MEMSET related macros.
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*
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* The following are straight forward implementations of memset and memcpy.
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*
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* NOTE: memcpy may not work if source and target memory area are overlapping.
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*
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* Copies a non-overlapping block of memory.
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*
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* @param DestPtr
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* Destination address to copy data to.
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*
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* @param SrcPtr
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* Source address to copy data from.
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*
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* @param Bytes
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* Number of bytes to copy.
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*
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* @return None.
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*
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* @note
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* The use of XENV_MEM_COPY is deprecated. Use memcpy() instead.
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*
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* @note
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* This implementation MAY BREAK work if source and target memory
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* area are overlapping.
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*
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*****************************************************************************/
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#define XENV_MEM_COPY(DestPtr, SrcPtr, Bytes) \
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memcpy((void *) DestPtr, (const void *) SrcPtr, (size_t) Bytes)
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/*****************************************************************************/
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/**
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*
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* Fills an area of memory with constant data.
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*
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* @param DestPtr
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* Destination address to copy data to.
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*
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* @param Data
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* Value to set.
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*
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* @param Bytes
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* Number of bytes to copy.
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*
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* @return None.
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*
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* @note
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* The use of XENV_MEM_FILL is deprecated. Use memset() instead.
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*
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*****************************************************************************/
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#define XENV_MEM_FILL(DestPtr, Data, Bytes) \
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memset((void *) DestPtr, (s32) Data, (size_t) Bytes)
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/******************************************************************************
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*
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* TIME related macros
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*
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******************************************************************************/
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/**
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* A structure that contains a time stamp used by other time stamp macros
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* defined below. This structure is processor dependent.
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*/
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typedef s32 XENV_TIME_STAMP;
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/*****************************************************************************/
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/**
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*
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* Time is derived from the 64 bit PPC timebase register
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*
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* @param StampPtr is the storage for the retrieved time stamp.
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*
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* @return None.
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*
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* @note
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*
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* Signature: void XENV_TIME_STAMP_GET(XTIME_STAMP *StampPtr)
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* <br><br>
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* This macro must be implemented by the user.
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*
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*****************************************************************************/
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#define XENV_TIME_STAMP_GET(StampPtr)
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/*****************************************************************************/
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/**
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*
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* This macro is not yet implemented and always returns 0.
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*
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* @param Stamp1Ptr is the first sampled time stamp.
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* @param Stamp2Ptr is the second sampled time stamp.
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*
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* @return 0
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*
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* @note
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*
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* This macro must be implemented by the user.
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*
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*****************************************************************************/
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#define XENV_TIME_STAMP_DELTA_US(Stamp1Ptr, Stamp2Ptr) (0)
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/*****************************************************************************/
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/**
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*
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* This macro is not yet implemented and always returns 0.
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*
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* @param Stamp1Ptr is the first sampled time stamp.
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* @param Stamp2Ptr is the second sampled time stamp.
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*
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* @return 0
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*
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* @note
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*
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* This macro must be implemented by the user.
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*
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*****************************************************************************/
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#define XENV_TIME_STAMP_DELTA_MS(Stamp1Ptr, Stamp2Ptr) (0)
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/*****************************************************************************/
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/**
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* XENV_USLEEP(unsigned delay)
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*
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* Delay the specified number of microseconds. Not implemented without OS
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* support.
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*
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* @param delay
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* Number of microseconds to delay.
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*
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* @return None.
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*
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*****************************************************************************/
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#ifdef __PPC__
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#define XENV_USLEEP(delay) usleep(delay)
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#define udelay(delay) usleep(delay)
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#else
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#define XENV_USLEEP(delay)
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#define udelay(delay)
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#endif
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/******************************************************************************
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*
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* CACHE handling macros / mappings
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*
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******************************************************************************/
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/******************************************************************************
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*
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* Processor independent macros
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*
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******************************************************************************/
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#define XCACHE_ENABLE_CACHE() \
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{ XCACHE_ENABLE_DCACHE(); XCACHE_ENABLE_ICACHE(); }
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#define XCACHE_DISABLE_CACHE() \
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{ XCACHE_DISABLE_DCACHE(); XCACHE_DISABLE_ICACHE(); }
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/******************************************************************************
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*
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* MicroBlaze case
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*
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* NOTE: Currently the following macros will only work on systems that contain
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* only ONE MicroBlaze processor. Also, the macros will only be enabled if the
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* system is built using a xparameters.h file.
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*
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******************************************************************************/
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#if defined __MICROBLAZE__
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/* Check if MicroBlaze data cache was built into the core.
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*/
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#if (XPAR_MICROBLAZE_USE_DCACHE == 1)
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# define XCACHE_ENABLE_DCACHE() microblaze_enable_dcache()
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# define XCACHE_DISABLE_DCACHE() microblaze_disable_dcache()
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# define XCACHE_INVALIDATE_DCACHE() microblaze_invalidate_dcache()
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# define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
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microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
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#if (XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK == 1)
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# define XCACHE_FLUSH_DCACHE() microblaze_flush_dcache()
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# define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
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microblaze_flush_dcache_range((s32)(Addr), (s32)(Len))
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#else
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# define XCACHE_FLUSH_DCACHE() microblaze_invalidate_dcache()
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# define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
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microblaze_invalidate_dcache_range((s32)(Addr), (s32)(Len))
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#endif /*XPAR_MICROBLAZE_DCACHE_USE_WRITEBACK*/
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#else
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# define XCACHE_ENABLE_DCACHE()
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# define XCACHE_DISABLE_DCACHE()
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# define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len)
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# define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len)
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#endif /*XPAR_MICROBLAZE_USE_DCACHE*/
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/* Check if MicroBlaze instruction cache was built into the core.
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*/
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#if (XPAR_MICROBLAZE_USE_ICACHE == 1)
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# define XCACHE_ENABLE_ICACHE() microblaze_enable_icache()
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# define XCACHE_DISABLE_ICACHE() microblaze_disable_icache()
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# define XCACHE_INVALIDATE_ICACHE() microblaze_invalidate_icache()
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# define XCACHE_INVALIDATE_ICACHE_RANGE(Addr, Len) \
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microblaze_invalidate_icache_range((s32)(Addr), (s32)(Len))
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#else
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# define XCACHE_ENABLE_ICACHE()
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# define XCACHE_DISABLE_ICACHE()
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#endif /*XPAR_MICROBLAZE_USE_ICACHE*/
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/******************************************************************************
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*
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* PowerPC case
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*
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* Note that the XCACHE_ENABLE_xxx functions are hardcoded to enable a
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* specific memory region (0x80000001). Each bit (0-30) in the regions
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* bitmask stands for 128MB of memory. Bit 31 stands for the upper 2GB
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* range.
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*
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* regions --> cached address range
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* ------------|--------------------------------------------------
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* 0x80000000 | [0, 0x7FFFFFF]
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* 0x00000001 | [0xF8000000, 0xFFFFFFFF]
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* 0x80000001 | [0, 0x7FFFFFF],[0xF8000000, 0xFFFFFFFF]
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*
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******************************************************************************/
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#elif defined __PPC__
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#define XCACHE_ENABLE_DCACHE() XCache_EnableDCache(0x80000001)
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#define XCACHE_DISABLE_DCACHE() XCache_DisableDCache()
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#define XCACHE_ENABLE_ICACHE() XCache_EnableICache(0x80000001)
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#define XCACHE_DISABLE_ICACHE() XCache_DisableICache()
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#define XCACHE_INVALIDATE_DCACHE_RANGE(Addr, Len) \
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XCache_InvalidateDCacheRange((u32)(Addr), (u32)(Len))
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#define XCACHE_FLUSH_DCACHE_RANGE(Addr, Len) \
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XCache_FlushDCacheRange((u32)(Addr), (u32)(Len))
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#define XCACHE_INVALIDATE_ICACHE() XCache_InvalidateICache()
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/******************************************************************************
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*
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* Unknown processor / architecture
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*
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******************************************************************************/
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#else
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/* #error "Unknown processor / architecture. Must be MicroBlaze or PowerPC." */
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* #ifndef XENV_STANDALONE_H */
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/**
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*@endcond
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*/
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