dsp: update test

This commit is contained in:
Paul Mathieu 2021-07-26 00:04:53 -07:00
parent 5948622212
commit 2bfced6a2b

View File

@ -32,8 +32,10 @@ architecture rtl of dsp_test is
signal led: std_logic_vector(7 downto 0);
signal uart_rx: std_logic;
signal uart_tx: std_logic;
signal uart0_rx: std_logic;
signal uart0_tx: std_logic;
signal uart1_rx: std_logic;
signal uart1_tx: std_logic;
signal pdmout0: std_logic;
type str is array(integer range <>) of std_logic_vector(7 downto 0);
@ -65,7 +67,8 @@ architecture rtl of dsp_test is
begin
dut: dsp port map(clk => clk, rst => rst,
led => led, uart_rx => uart_rx, uart_tx => uart_tx,
led => led, uart0_rx => uart0_rx, uart0_tx => uart0_tx,
uart1_rx => uart1_rx, uart1_tx => uart1_tx,
pdmout0_pin => pdmout0);
@ -75,22 +78,24 @@ begin
begin
rst <= '1';
uart_rx <= '1';
uart0_rx <= '1';
wait for 15 ns;
assert(led=x"00") report "Fail rst" severity error;
rst <= '0';
-- wait for 20 us;
-- uart_send(prog, uart_rx);
wait for 20 us;
uart_send(prog, uart0_rx);
wait for 2 us;
assert(led = x"f0") report "Fail prog" severity error;
-- uart_send(jump, uart0_rx);
-- wait for 2 us;
-- assert(led = x"f0") report "Fail prog" severity error;
-- uart_send(jump, uart_rx);
-- wait for 2 us;
-- assert(led = x"01") report "Fail prog" severity error;
-- assert(led = x"2a") report "Fail prog" severity error;
wait for 200 us;
-- wait for 200 us;
-- uart_send(midi, uart1_rx);
assert false report "Test done." severity note;