From 24c6831813af534d053974e0a0ca274a1777d412 Mon Sep 17 00:00:00 2001 From: Paul Mathieu Date: Sat, 13 Mar 2021 21:02:54 -0800 Subject: [PATCH] Small fixes for synthesis --- cpu/cpu.vhdl | 2 +- dsp/dsp.vhdl | 2 +- sysbus/sysbus.vhdl | 3 +++ 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/cpu/cpu.vhdl b/cpu/cpu.vhdl index 7b9abf3..1d0997e 100644 --- a/cpu/cpu.vhdl +++ b/cpu/cpu.vhdl @@ -80,7 +80,7 @@ begin code_addr <= reg_q(14); - process(code_data, reg_q, mem_in, mem_busy, alu_q, alu_flag, cpu_state, load_addr, load_reg) is + process(code_data, reg_q, mem_in, mem_busy, alu_q, alu_flag, cpu_state, load_addr, load_reg, hold_inst) is variable inst: std_logic_vector(15 downto 0); variable regn_0: natural; variable regn_1: natural; diff --git a/dsp/dsp.vhdl b/dsp/dsp.vhdl index 5740676..c6693cb 100644 --- a/dsp/dsp.vhdl +++ b/dsp/dsp.vhdl @@ -232,7 +232,7 @@ begin end if; end process; - process(bus_addr, bus_mosi, bus_write, mem_out, rst, rom_data_out, led_r, bus_read) + process(bus_addr, bus_mosi, bus_write, mem_out, rst, rom_data_out, led_r, bus_read, uart_dout) begin bus_miso <= x"0000"; diff --git a/sysbus/sysbus.vhdl b/sysbus/sysbus.vhdl index d29c483..36518a1 100644 --- a/sysbus/sysbus.vhdl +++ b/sysbus/sysbus.vhdl @@ -58,7 +58,10 @@ begin end if; pend_next <= pend; + pend_addr_next <= pend_addr; + pend_wdata_next <= pend_wdata; owner_next <= "00"; + state_next <= IDLE; bus_we <= '0'; bus_re <= '0';