75 lines
3.0 KiB
C
75 lines
3.0 KiB
C
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/******************************************************************************
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* Copyright (c) 2021 Xilinx, Inc. All rights reserved.
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* SPDX-License-Identifier: MIT
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******************************************************************************/
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/*****************************************************************************/
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/**
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*
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* @file xinterrupt_wrap.h
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*
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* The xinterrupt_wrap.h file contains interrupt related functions and macros.
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*
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* @{
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* <pre>
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* MODIFICATION HISTORY:
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*
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* Ver Who Date Changes
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* ----- ---- -------- -------------------------------------------------------
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* 7.2 mus 22/11/21 First release of xil interrupt support
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* </pre>
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*
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******************************************************************************/
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#ifndef XINTERRUPT_WRAP_H /* prevent circular inclusions */
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#define XINTERRUPT_WRAP_H /* by using protection macros */
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#include "xil_types.h"
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#include "xstatus.h"
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#include "xparameters.h"
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#include "xil_exception.h"
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#ifdef XIL_INTERRUPT
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#if defined(XPAR_AXI_INTC)
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#include "xintc.h"
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#endif
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#if defined(XPAR_SCUGIC)
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#include "xscugic.h"
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#define XSPI_INTR_OFFSET 32U
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#endif
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#define XINTERRUPT_DEFAULT_PRIORITY 0xA0U /* AXI INTC doesnt support priority setting, it is default priority for GIC interrupts */
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#define XINTC_TYPE_IS_SCUGIC 0U
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#define XINTC_TYPE_IS_INTC 1U
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#define XINTR_IS_EDGE_TRIGGERED 3U
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#define XINTR_IS_LEVEL_TRIGGERED 1U
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#define XINTC_TYPE_MASK 0x1
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#define XINTC_INTR_TYPE_MASK 0x100000
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#define XINTC_BASEADDR_MASK 0xFFFFFFFFFFFFFFFE
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#define XINTC_INTRID_MASK 0xFFF
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#define XINTC_TRIGGER_MASK 0xF000
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#define XINTC_TRIGGER_SHIFT 12
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#define XINTC_INTR_TYPE_SHIFT 20U
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#define XGet_IntcType(IntParent) (IntParent & XINTC_TYPE_MASK)
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#define XGet_IntrType(IntId) ((IntId & XINTC_INTR_TYPE_MASK) >> XINTC_INTR_TYPE_SHIFT)
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#define XGet_BaseAddr(IntParent) (IntParent & XINTC_BASEADDR_MASK)
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#define XGet_IntrId(IntId) (IntId & XINTC_INTRID_MASK)
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#define XGet_TriggerType(IntId) ((IntId & XINTC_TRIGGER_MASK) >> XINTC_TRIGGER_SHIFT)
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#define XGet_IntrOffset(IntId) (( XGet_IntrType(IntId) == 1) ? 16 : 32) /* For PPI offset is 16 and for SPI it is 32 */
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extern int XConfigInterruptCntrl(UINTPTR IntcParent);
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extern int XConnectToInterruptCntrl(u32 IntrId, void *IntrHandler, void *CallBackRef, UINTPTR IntcParent);
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extern int XDisconnectInterruptCntrl(u32 IntrId, UINTPTR IntcParent);
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extern int XStartInterruptCntrl(u32 Mode, UINTPTR IntcParent);
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extern void XEnableIntrId( u32 IntrId, UINTPTR IntcParent);
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extern void XDisableIntrId( u32 IntrId, UINTPTR IntcParent);
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extern void XSetPriorityTriggerType( u32 IntrId, u8 Priority, UINTPTR IntcParent);
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extern void XGetPriorityTriggerType( u32 IntrId, u8 *Priority, u8 *Trigger, UINTPTR IntcParent);
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extern void XStopInterruptCntrl( UINTPTR IntcParent);
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extern void XRegisterInterruptHandler( void *IntrHandler, UINTPTR IntcParent);
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extern int XSetupInterruptSystem(void *DriverInstance, void *IntrHandler, u32 IntrId, UINTPTR IntcParent, u16 Priority);
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#endif
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#endif /* end of protection macro */
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